共 50 条
- [41] Scan Test Strategy for Asynchronous-Synchronous Interfaces Journal of Electronic Testing, 2004, 20 : 639 - 645
- [42] Scan test strategy for asynchronous-synchronous interfaces EIGHTH IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS, 2003, : 43 - 48
- [43] Automatic scan insertion and test generation for asynchronous circuits INTERNATIONAL TEST CONFERENCE 2002, PROCEEDINGS, 2002, : 804 - 813
- [44] A partial scan based test generation for asynchronous circuits 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS, 2008, : 186 - 189
- [45] Automatic scan insertion and pattern generation for asynchronous circuits DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, : 672 - 673
- [46] Partial scan delay fault testing of asynchronous circuits 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 728 - 735
- [47] Reimbursing the handshake overhead of asynchronous circuits using compiler pre-synthesis optimizations 11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS, 2008, : 290 - +
- [48] Design of asynchronous circuits using synchronous CAD tools IEEE DESIGN & TEST OF COMPUTERS, 2002, 19 (04): : 107 - 117