The implementation of chaos-based PUF designs in field programmable gate array

被引:0
|
作者
Taner Tuncer
机构
[1] Fırat University,Department of Computer Engineering, Faculty of Engineering
来源
Nonlinear Dynamics | 2016年 / 86卷
关键词
Logistic map; Ring oscillator; PUF; Statistical tests;
D O I
暂无
中图分类号
学科分类号
摘要
The security of cryptographic systems depends on the unpredictability, not being regenerate and good statistical properties of the random numbers. The numbers, generated to provide the peculiarities, need to be the true random ones. Another method for generating these numbers is physical unclonable functions based on ring oscillator (RO-PUF). PUFs show susceptibility to reverse engineering, emulation, man-in-the-middle and reconfiguration attacks. In this paper, the chaotic signs which were generated from logistic map are applied to the challenge of RO-PUF in order to prevent such undesirable occurrences. Chaotic-based RO-PUF was implemented on Altera’s FPGA-based 60-nm EP4CE115F29C7 development boards by using VHDL language. The obtained random numbers passed the NIST statistical tests, accepted as standard for cryptographic applications. Additionally, the periodicity degree of the system is evaluated by the scale index method and correlations between the generated numbers are analyzed by the autocorrelation method to demonstrate their validity. The results of the developed system show that it is possible to prevent the attacks which PUFs are subjected to and increase the randomness of the obtained numbers as well.
引用
收藏
页码:975 / 986
页数:11
相关论文
共 50 条
  • [41] Field-programmable gate array implementation of a single photoncounting receive modem
    Simon, William P.
    Downey, Jennifer N.
    Lantz, Nicholas C.
    Bizon, Thomas P.
    Marsden, Michael A.
    Vyhnalek, Brian E.
    Zeleznikar, Daniel J.
    FREE-SPACE LASER COMMUNICATIONS XXXVI, 2024, 12877
  • [42] Implementation on Sobel Field-Programmable Gate Array Detector for Identification of Vehicles
    Seleznev, V. S.
    Antonova, E. O.
    Iluhin, A., V
    Gematudinov, R. A.
    Isaeva, L. Yu
    2021 INTELLIGENT TECHNOLOGIES AND ELECTRONIC DEVICES IN VEHICLE AND ROAD TRANSPORT COMPLEX (TIRVED), 2021,
  • [43] A low cost implementation neural network using field programmable gate array
    Electrical Engineering Dept, College of Engineering, University of Baghdad, Baghdad, Iraq
    不详
    不详
    Adv Model Anal B, 2006, 1-2 (17-27):
  • [44] Optimized field programmable gate array based function evaluation
    Sidahao, N
    FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2004, 3203 : 1184 - 1184
  • [45] Implementation of Multimedia System-on-Chip in Field Programmable Gate Array Device
    Kodavalla, Vijay Kumar
    Rao, Venumadhav H.
    Panakkal, Jaison Martin
    PROCEEDINGS OF THE 5TH INTERNATIONAL CONFERENCE ON INVENTIVE COMPUTATION TECHNOLOGIES (ICICT-2020), 2020, : 947 - 952
  • [46] Implementation of Partial Synchronization of Different Chaotic Systems by Field Programmable Gate Array
    Eroglu, Can
    Savaci, F. Acar
    2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, : 559 - 562
  • [47] Field Programmable Gate Array-Based Attitude Stabilization
    Stepaniak, Michael J.
    de Haag, Maarten Uijt
    van Graas, Frank
    JOURNAL OF AEROSPACE COMPUTING INFORMATION AND COMMUNICATION, 2009, 6 (07): : 451 - 463
  • [48] Image Correction Based on Field-Programmable Gate Array
    Mao, Xinrong
    Liu, Kaiming
    SSPS 2020: 2020 2ND SYMPOSIUM ON SIGNAL PROCESSING SYSTEMS, 2020, : 30 - 36
  • [49] Hardware Considerations for Tensor Implementation and Analysis Using the Field Programmable Gate Array
    Grout, Ian
    Mullin, Lenore
    ELECTRONICS, 2018, 7 (11)
  • [50] Field Programmable Gate Array Implementation of Reversible Binary Coded Decimal Multiplier
    Devi, S. Sharmila
    Bhanumathi, V.
    Aruna, T. Abiseha
    JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS, 2024, 19 (10) : 1053 - 1062