Use of particle swarm optimization to design combinational logic circuits

被引：0
|
作者：
Coello, CAC
Luna, EH
Aguirre, AH
机构：
[1] IPN, CINVESTAV, Evolutionary Computat Grp, Dept Ing Elect,Secc Computac, Mexico City 07300, DF, Mexico
[2] CIMAT, Area Computac, Guanajuato 36240, Mexico
来源：
EVOLVABLE SYSTEMS: FROM BIOLOGY TO HARDWARE, PROCEEDINGS | 2003年 / 2606卷
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper presents a proposal based on binary particle swarm optimization to design combinational logic circuits at the gate-level. The proposed algorithm is validated using several examples from the literature, and is compared against a genetic algorithm (with integer representation), and against human designers who used traditional circuit design aids (e.g., Karnaugh Maps). Results indicate that particle swarm optimization may be a viable alternative to design combinational circuits at the gate-level.
引用
收藏
页码：398 / 409
页数：12
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