Ultra thin gate oxide characterization

被引:0
|
作者
Roy, D
Bruyere, S
Rideau, D
Gilibert, F
Giguerre, L
Monsieur, F
Gouget, G
Scheer, P
机构
[1] STMicroelect, Cent R&D Labs, F-38926 Crolles, France
[2] Philips Semicond, Cent R&D Labs, F-38926 Crolles, France
[3] IMT Technopole Chateau Gombet, L2MP, F-13451 Marseille, France
来源
关键词
D O I
10.1051/epjap:2004072
中图分类号
O59 [应用物理学];
学科分类号
摘要
The increase of the gate leakage current of advanced CMOS technologies makes standard electrical characterization methods as C(V) measurement or charge pumping more complex and uncertain. In this paper, and based on C(V) characteristics, main elements that directly affect the electrical measurements of ultra thin MOS devices are clarified. Then, classical parameter extraction techniques are reviewed, pointing out their absolute limitations or giving potential keys of improvement.
引用
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页码:21 / 27
页数:7
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