An approach for pre-silicon power modeling

被引:0
|
作者
Agrawal, Prashant [1 ]
Srinivasa, R. S. T. G. [2 ]
Oke, Ajit N. [2 ]
Vijay, Saurabh [2 ]
机构
[1] Indian Inst Technol, CSE, Kharagpur 721302, W Bengal, India
[2] Intel Technol IP Ltd, MG I, Bangalore 560037, Karnataka, India
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Accurate estimation of power in pre-silicon is very important and finally to validate this against post-silicon measurement is essential throughout product lifecycle. Thermal Design Power (TDP)(1) estimates are used to design package thermal solutions. In this paper a modeling approach for dynamic power estimation under TDP conditions is proposed. In this approach, separate models are built for each partition in the design. The model uses only bandwidth and the effective toggle rate of the input data for estimating the total switched capacitance and dynamic power. The model takes into account the effect of cross-coupling capacitance on dynamic power The results obtained from the model are within 7% of the measured data.
引用
下载
收藏
页码:99 / +
页数:2
相关论文
共 50 条
  • [31] TEESec: Pre-Silicon Vulnerability Discovery for Trusted Execution Environments
    Ghaniyoun, Moein
    Barber, Kristin
    Xiao, Yuan
    Zhang, Yinqian
    Teodorescu, Radu
    PROCEEDINGS OF THE 2023 THE 50TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, ISCA 2023, 2023, : 489 - 503
  • [32] Pre-Silicon Yield Estimation using Machine Learning Regression
    Sandru, Elena-Diana
    David, Emilian
    Pelz, Georg
    2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2019, : 103 - 104
  • [33] An integrated flow from pre-silicon simulation to post-silicon verification
    Melani, Massimiliano
    D'Ascoli, Francesco
    Marino, Corrado
    Fanucci, Luca
    Giambastiani, Adolfo
    Rocchi, Alessandro
    De Marinis, Marco
    Monterastelli, Andrea
    PRIME 2006: 2ND CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONIC AND ELECTRONICS, PROCEEDINGS, 2006, : 205 - +
  • [34] Software agnostic approaches to explore pre-silicon system performance
    Risacher, Frederic
    Schultz, Kenneth J.
    2011 IEEE INTERNATIONAL HIGH LEVEL DESIGN VALIDATION AND TEST WORKSHOP (HLDVT), 2011, : 116 - 120
  • [35] Novel Power Delivery Network Design and Pre-Silicon Validation Supporting Heterogeneous Dies on a Single Package
    Amanor-Boadu, Judy
    Bazaz, Rishik
    Bakliwal, Priyanka
    IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 1304 - 1309
  • [36] Pre-silicon Formal Verification of JTAG Instruction Opcodes for Security
    Fern, Nicole
    Cheng, Kwang-Ting
    2018 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2018,
  • [37] Hardware Virtualization for Pre-Silicon Software Development in Automotive Electronics
    Schirrmeister, Frank
    Thoen, Filip
    SAE INTERNATIONAL JOURNAL OF PASSENGER CARS-ELECTRONIC AND ELECTRICAL SYSTEMS, 2009, 2 (01): : 367 - 375
  • [38] A Method to Leverage Pre-Silicon Collateral and Analysis for Post-Silicon Testing and Validation
    Miller, Gary
    Bhattarai, Bandana
    Hsu, Yu-Chin
    Dutt, Jay
    Chen, Xi
    Bakewell, George
    PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2011, : 575 - 578
  • [39] Accelerating Chip Design with Machine Learning: From Pre-Silicon to Post-Silicon
    Zhuo, Cheng
    Yu, Bei
    Gao, Di
    2017 30TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2017, : 227 - 232
  • [40] Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-channel Simulation
    Li, Henian
    Lin, Lang
    Chang, Norman
    Chowdhury, Sreeja
    Mcguire, Dylan
    Novakovic, Bozidar
    Monta, Kazuki
    Nagata, Makoto
    Li, Ying-Shiun
    Pramod, M. S.
    Yeh, Piin-Chen
    Jang, J. -S. Roger
    Xi, Chengjie
    Jin, Qiutong
    Asadi, Navid
    Tehranipoor, Mark
    2024 IEEE INTERNATIONAL SYMPOSIUM ON HARDWARE ORIENTED SECURITY AND TRUST, HOST, 2024, : 107 - 111