Mechanism of floating body effect mitigation via cutting off source injection in a fully-depleted silicon-on-insulator technology

被引：2

作者：

Huang, Pengcheng ^{[1
]}

Chen, Shuming ^{[1
,2
]}

Chen, Jianjun ^{[1
]}

机构：

[1] Natl Univ Def Technol, Coll Comp, Changsha 410073, Hunan, Peoples R China

[2] Natl Univ Def Technol, Natl Lab Parallel & Distributed Proc, Changsha 410073, Hunan, Peoples R China

来源：

CHINESE PHYSICS B | 2016年 / 25卷 / 03期

基金：

中国国家自然科学基金;

关键词：

floating body effect; in-line stacking; silicon-on-insulator; source injection; SINGLE-EVENT TRANSIENTS; SEU RESISTANCE; SOI-SRAMS; BULK; PROPAGATION; UPSET;

D O I：

10.1088/1674-1056/25/3/036103

中图分类号：

O4 [物理学];

学科分类号：

0702 ;

摘要：

In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D-TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carrier drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout.

引用

页数：7

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