A 14-bit cascaded 3-2 Sigma-Delta modulator for VDSL

被引:0
|
作者
Di Gioia, Eugenio [1 ]
Klar, Heinrich [1 ]
Schwoerer, Christoph [2 ]
机构
[1] Tech Univ Berlin, Inst Comp Engn & Microelect, Berlin, Germany
[2] Infineon Technol AG, Munich, Germany
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Wideband Sigma-Delta A/D-converters must make use of low oversampling ratios, so that the sampling frequency remains acceptably low. In order to obtain high resolutions, the alternatives are increasing the bit-number of the internal quantizer or the loop-order. As high order single-loop modulators are prone to instability, cascaded structures are usually employed. To relax the mismatch sensitivity inherent to cascaded structures, we use a third rather than a second order modulator in the first loop. The proposed 3(5-bit)-2(2-bit) cascaded modulator achieves an effective resolution of 14-Bits over a bandwidth of 12.5MHz with an Oversampling ratio (OSR) of only 8 taking into account all non-idealities. The Signal-to-Quantization-Noise-Ratio (SQNR) is maximized, thanks to the optimized 5-th-order noise transfer function (NTF), which has two pairs of complex conjugate zeros and one dc-zero. Low distortion is achieved through feed-forward paths, which add the signal direct at the quantizer input, rela xing the integrator specifications.
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页码:698 / +
页数:2
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