Innovative system-level design environment based on FORM for transport processing system

被引：2
|
作者：
Higuchi, K [1 ]
Shirakawa, K [1 ]
机构：
[1] NTT, Opt Network Syst Labs, Kanagawa 2390847, Japan
来源：
DESIGN, AUTOMATION AND TEST IN EUROPE, PROCEEDINGS | 1998年
关键词：
D O I：
10.1109/DATE.1998.655962
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a system-level design environment for data transport processing systems. In this environment, designers can easily verify system behavior by formally defining data structures and their related actions, without considering derailed timing. In addition, the verified specification can be translated into synthesizable RTL descriptions by a dedicated RTL generator. Thus, using lower-level EDA tools, actual hardware can be obtained directly from a system-level specification.
引用
收藏
页码：883 / 890
页数：8
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