A customizable embedded SoC platform architecture

In this paper, we present a general purpose and customizable IP platform, with hardware support for multiprocessors, multi-threading and real-time applications. It integrates essential elements of a scalable SoC software and hardware architecture. The communication structure is based on virtual channels. As a result, the latencies across the software and hardware resources are significantly reduced. We use queues to communicate between functional units (or IP cores) in order to facilitate timing closure and verification.