Efficient Embedded SoC Hardware/Software Codesign using Virtual Platform

A complete framework and methodology to design, simulate, and debug large SoC is presented. Full VP creation using efficient tools is described. An efficient tool to allow co-debug of HW/SW on VP is also presented. The tools enable debugging and analyzing an application and a Linux driver that run on the VP. Breakpoints and mon commands can be used to detect and correct errors, access registers and review their values. The tools provide simulation of SW and HW on the same timeline. They also, involve building, uploading and debugging a Linux driver on the VP. The procedure steps for debugging the application code on the VP are provided. How to create an analyzer project with an analyzer session to perform SW and HW analysis, and save the results are also described. Functions and capabilities to investigate the tracing results are presented. Preparing the Environment of Linux Software Development with VP is needed before running the debug flow. How to prepare the system environment is summarized. Complex applications can run on the VP. Debugging both the application and the Linux drivers, and analyzing both the SW and the HW are made easy. Powerful SW tracing is provided. HW architecture analysis is an additional domain to be explored by the methodology. SW and HW profiling is shown to be not only feasible, but also handy. Very graphical waveforms and user friendly environment with easy Graphical User Interface (GUI) show how flexible and powerful the methodology is. A test case demonstrating the flexibility and efficiency of our technique is presented.