共 44 条
- [31] Double-gate fully-depleted SOI transistors for low-power high-performance nano-scale circuit design [J]. ISLPED'01: PROCEEDINGS OF THE 2001 INTERNATIONAL SYMPOSIUM ON LOWPOWER ELECTRONICS AND DESIGN, 2001, : 213 - 218
- [32] Determination of flat-band voltages for fully depleted silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFET's) [J]. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 1992, 31 (9 A): : 2678 - 2681
- [35] Optimization of H2 thermal annealing process for the fabrication of ultra-low loss sub-micron silicon-on-insulator rib waveguides [J]. SILICON PHOTONICS XIII, 2018, 10537
- [37] Performance comparison of ultrathin fully depleted silicon-on-insulator inversion-, intrinsic-, and accumulation-mode metal-oxide-semiconductor field-effect transistors [J]. 1600, Japan Society of Applied Physics (47):
- [38] Consideration of performance limitation of sub-100-nm double-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 2002, 41 (10A): : L1096 - L1098
- [39] Ultra low-leakage power strategies for sub-1 VVLSI: Novel circuit styles and design methodologies for partially depleted silicon-on-insulator (PD-SOI) CMOS technology [J]. 16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 291 - 296
- [40] Impact of improved high-performance Si(110)-oriented metal-oxide- semiconductor field-effect transistors using accumulation-mode fully depleted silicon-on-insulator devices [J]. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 2006, 45 (4 B): : 3110 - 3116