Thermo-mechanical reliability of power flip-chip cooling concepts

被引:9
|
作者
Wunderle, B [1 ]
Dudek, R [1 ]
Michel, B [1 ]
Reich, H [1 ]
机构
[1] Fraunhofer Inst Zuverlassigkeit & Mikrointegrat, D-13355 Berlin, Germany
关键词
D O I
10.1109/ECTC.2004.1319375
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we examine the thermo-mechanical reliability of solder bumps for the situation where a flip-chip mounted die is, in addition to periodic thermal loads, constrained by mechanical boundary conditions caused by the attachment of a heatsink. Two cooling concepts were chosen to study their effects on bump reliability: In one configuration the heat-sink is attached to the reverse side of the die and in the other it is attached below the board. An ample study was carried out based on modular-parametric FE-simulations for bump lifetime prediction and thermal cycling tests for experimental verification. The experiments do coincide well with the simulative prediction, allowing for the first time a clear statement about the reliability of flip-chip packages with attached heat-sinks. It results that in general all additional constraints on the chip do reduce bump lifetime, but by adjustment of material and geometric parameters it can be maximised. Eventually design guidelines are given which are obtained by systematic variation of characteristic parameters determining reliability of such assemblies.
引用
收藏
页码:427 / 436
页数:10
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