Thermo-mechanical reliability of power flip-chip cooling concepts

被引:9
|
作者
Wunderle, B [1 ]
Dudek, R [1 ]
Michel, B [1 ]
Reich, H [1 ]
机构
[1] Fraunhofer Inst Zuverlassigkeit & Mikrointegrat, D-13355 Berlin, Germany
关键词
D O I
10.1109/ECTC.2004.1319375
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we examine the thermo-mechanical reliability of solder bumps for the situation where a flip-chip mounted die is, in addition to periodic thermal loads, constrained by mechanical boundary conditions caused by the attachment of a heatsink. Two cooling concepts were chosen to study their effects on bump reliability: In one configuration the heat-sink is attached to the reverse side of the die and in the other it is attached below the board. An ample study was carried out based on modular-parametric FE-simulations for bump lifetime prediction and thermal cycling tests for experimental verification. The experiments do coincide well with the simulative prediction, allowing for the first time a clear statement about the reliability of flip-chip packages with attached heat-sinks. It results that in general all additional constraints on the chip do reduce bump lifetime, but by adjustment of material and geometric parameters it can be maximised. Eventually design guidelines are given which are obtained by systematic variation of characteristic parameters determining reliability of such assemblies.
引用
收藏
页码:427 / 436
页数:10
相关论文
共 50 条
  • [1] Effect of material and geometry parameters on the thermo-mechanical reliability of flip-chip assemblies
    Michaelides, S
    Sitaraman, SK
    [J]. ITHERM '98: SIXTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, 1998, : 193 - 200
  • [2] Thermo-mechanical deformation of underfilled flip-chip packaging
    Dai, X
    Ho, PS
    [J]. TWENTY FIRST IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 1997, : 326 - 333
  • [3] Thermo-mechanical Reliability Analysis of Flip-Chip Bonded Silicon Carbide Schottky Diodes
    Seal, Sayan
    Wallace, Andrea K.
    Zumbro, John E.
    Mantooth, H. Alan
    [J]. 2017 IEEE INTERNATIONAL WORKSHOP ON INTEGRATED POWER PACKAGING (IWIPP), 2017,
  • [4] Thermo-mechanical deformation and stress analysis of a flip-chip BGA
    Wu, JD
    Lai, YS
    Kuo, YL
    Hung, SC
    Jen, MHR
    [J]. ADVANCES IN ELECTRONIC PACKAGING 2003, VOL 1, 2003, : 309 - 316
  • [5] Decision-support models for thermo-mechanical reliability of leadfree flip-chip electronics in extreme environments
    Lall, P
    Singh, N
    Strickland, M
    Blanche, J
    Suhling, J
    [J]. 55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS, 2005, : 127 - 136
  • [6] Artificial Neural Networks and Bayesian Techniques for Flip-Chip Package Thermo-Mechanical Analysis
    Sinha, Tuhin
    Sikka, Kamal
    Lall, Rahul
    [J]. IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), 2021, : 1442 - 1449
  • [7] Organic substrates for flip-chip design: A thermo-mechanical model that accounts for heterogeneity and anisotropy
    Valdevit, L.
    Khanna, V.
    Sharma, A.
    Sri-Jayantha, S.
    Questad, D.
    Sikka, K.
    [J]. MICROELECTRONICS RELIABILITY, 2008, 48 (02) : 245 - 260
  • [8] Effect of underfill filler settling on thermo-mechanical fatigue analysis of flip-chip eutectic solders
    Chen, Cheng-fu
    [J]. MICROELECTRONICS RELIABILITY, 2008, 48 (07) : 1040 - 1051
  • [9] Experimental study on the thermo-mechanical effects of underfill and low-CTE substrate in a flip-chip device
    Morita, Y
    Arakawa, K
    Todo, M
    Kaneto, M
    [J]. MICROELECTRONICS RELIABILITY, 2006, 46 (5-6) : 923 - 929
  • [10] Coupled Thermal and Thermo-Mechanical Simulation for Flip-chip Component Level Copper Pillar Bump Fatigue
    Shantaram, Sandeep
    Sakib, A. R. Nazmus
    Lakhera, Nishant
    [J]. PROCEEDINGS OF THE 17TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2018), 2018, : 1381 - 1386