Organic substrates for flip-chip design: A thermo-mechanical model that accounts for heterogeneity and anisotropy

被引:22
|
作者
Valdevit, L. [1 ]
Khanna, V. [1 ]
Sharma, A. [1 ]
Sri-Jayantha, S. [1 ]
Questad, D. [2 ]
Sikka, K. [2 ]
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[2] IBM Corp, Syst & Technol Corp, Fishkill, NY 12533 USA
关键词
D O I
10.1016/j.microrel.2007.03.006
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We present a thermo-mechanical characterization of organic substrates that accounts for heterogeneity both in the in-plane and out-of-plane directions. Systematic observation of the board files of a number of substrates of commercial interest reveals primarily three recurrent topological arrangements of copper and polymer; for each arrangement, the in-plane effective thermo-clastic properties are calculated via appropriate composite materials models. The averaging process in the out-of-plane direction (i.e. the stacking effect) is performed using standard laminated plate theory. The model is successfully applied to various regions of three organic substrates of interest (mainly differing in core thickness): the analytically calculated effective Young's moduli (E) and coefficients of thermal expansion (CTE) are shown to be typically within 10% of the experimental measurements. An important attribute of this model is its ability to provide substrate description at various levels of complexity: a few effective properties are outputted that can be useful for further purely analytical investigations; at the same time, the model provides the full stiffness matrix for each region of the substrate, to be used for more detailed finite elements simulations of higher-level structures (e.g. silicon die/underfill/substrate/cooling solution assemblies). Preliminary application of this model to the warp analysis of a flip-chip is presented in the end. (C) 2007 Elsevier Ltd. All rights reserved.
引用
收藏
页码:245 / 260
页数:16
相关论文
共 50 条
  • [1] Thermo-mechanical deformation of underfilled flip-chip packaging
    Dai, X
    Ho, PS
    [J]. TWENTY FIRST IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 1997, : 326 - 333
  • [2] Thermo-mechanical deformation and stress analysis of a flip-chip BGA
    Wu, JD
    Lai, YS
    Kuo, YL
    Hung, SC
    Jen, MHR
    [J]. ADVANCES IN ELECTRONIC PACKAGING 2003, VOL 1, 2003, : 309 - 316
  • [3] Thermo-mechanical reliability of power flip-chip cooling concepts
    Wunderle, B
    Dudek, R
    Michel, B
    Reich, H
    [J]. 54TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2004, : 427 - 436
  • [4] Effect of material and geometry parameters on the thermo-mechanical reliability of flip-chip assemblies
    Michaelides, S
    Sitaraman, SK
    [J]. ITHERM '98: SIXTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, 1998, : 193 - 200
  • [5] Artificial Neural Networks and Bayesian Techniques for Flip-Chip Package Thermo-Mechanical Analysis
    Sinha, Tuhin
    Sikka, Kamal
    Lall, Rahul
    [J]. IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), 2021, : 1442 - 1449
  • [6] Thermo-mechanical Reliability Analysis of Flip-Chip Bonded Silicon Carbide Schottky Diodes
    Seal, Sayan
    Wallace, Andrea K.
    Zumbro, John E.
    Mantooth, H. Alan
    [J]. 2017 IEEE INTERNATIONAL WORKSHOP ON INTEGRATED POWER PACKAGING (IWIPP), 2017,
  • [7] Effect of underfill filler settling on thermo-mechanical fatigue analysis of flip-chip eutectic solders
    Chen, Cheng-fu
    [J]. MICROELECTRONICS RELIABILITY, 2008, 48 (07) : 1040 - 1051
  • [8] Decision-support models for thermo-mechanical reliability of leadfree flip-chip electronics in extreme environments
    Lall, P
    Singh, N
    Strickland, M
    Blanche, J
    Suhling, J
    [J]. 55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS, 2005, : 127 - 136
  • [9] Experimental study on the thermo-mechanical effects of underfill and low-CTE substrate in a flip-chip device
    Morita, Y
    Arakawa, K
    Todo, M
    Kaneto, M
    [J]. MICROELECTRONICS RELIABILITY, 2006, 46 (5-6) : 923 - 929
  • [10] Coupled Thermal and Thermo-Mechanical Simulation for Flip-chip Component Level Copper Pillar Bump Fatigue
    Shantaram, Sandeep
    Sakib, A. R. Nazmus
    Lakhera, Nishant
    [J]. PROCEEDINGS OF THE 17TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2018), 2018, : 1381 - 1386