Experimental study on the thermo-mechanical effects of underfill and low-CTE substrate in a flip-chip device

被引:10
|
作者
Morita, Y
Arakawa, K
Todo, M
Kaneto, M
机构
[1] Kyushu Univ, RIAM, Kasuga, Fukuoka 8168580, Japan
[2] Nitto Denko Corp, Kameyama, Mie 5190193, Japan
关键词
D O I
10.1016/j.microrel.2005.02.013
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Moire interferometry was used to analyze the thermal deformation of four flip-chip devices mounted on FR-4 substrate and a new multi-layer substrate, with and without underfill. Thermal loading was applied by cooling the devices from 100 degrees C to room temperature (25 degrees C). The effects of underfill and the low-CTE (coefficient of thermal expansion) substrate on thermal deformation were investigated. The experimental results showed that the underfill curved in a manner similar to the silicon chip. For the flip-chip devices mounted on the multi-layer substrate, the CTE mismatch between the silicon chip and substrate was reduced, and bending deformation decreased. Of the four flip-chip devices studied, the underfilled flip-chip device mounted on the multi-layer substrate had the least deformed solder balls. (c) 2005 Elsevier Ltd. All rights reserved.
引用
收藏
页码:923 / 929
页数:7
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