Numerical evaluation of thermal cycling reliability of high performance flip-chip package assembly using submodeling analysis

被引：4

作者：

Kao, Chin-Li ^{[1
]}

Lai, Yi-Shao ^{[1
]}

Wang, Tong Hong ^{[1
]}

机构：

[1] Adv Semicond Engn Inc, Stress Reliabil lab, Kaohsiung 811, Taiwan

来源：

JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS | 2007年 / 30卷 / 02期

关键词：

submodeling; finite element analysis; thermal cycling; high-performance flip-chip package;

D O I：

10.1080/02533839.2007.9671262

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

This paper applies the submodeling technique in analyzing thermal cycling reliability of high performance flip-chip ball grid array package assemblies. The packages have one-piece tunnel-type heat spreaders with different lead widths, connected to chips using different thermal interface materials. The global model contains no solder bumps to simplify the analysis. The calculated displacement field of the global model is then interpolated on the boundary of the submodel that contains the critical solder bump. The submodel is solved using the prescribed displacement boundary conditions together with external thermal loads to evaluate thermomechanical reliability of the critical solder bump.

引用

页码：349 / 352

页数：4

共 50 条

[21] Electrothermal coupling analysis of current crowding and joule heating in flip-chip package assembly
Kao, CL
Lai, YS
6TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, PROCEEDINGS (EPTC 2004), 2004, : 254 - 258
[22] Using computer models to identify optimal conditions for flip-chip assembly and reliability
Bailey, Christopher
Lu, Hua
Glinski, Greg
Wheeler, Daniel
Hamilton, Phil
Hendriksen, Mike
Smith, Brian
1600, Emerald Group Publishing Ltd. (28):
[23] VISCO-ELASTIC EFFECT OF UNDERFILL MATERIAL IN RELIABILITY ANALYSIS OF FLIP-CHIP PACKAGE
Kanda, Yoshihiko
Zama, Kunihiro
Kariya, Yoshiharu
Mikami, Takao
Kobayashi, Takaya
Sato, Toshiyuki
Enomoto, Toshiaki
Hirata, Koichi
IPACK 2009: PROCEEDINGS OF THE ASME INTERPACK CONFERENCE 2009, VOL 1, 2010, : 755 - 759
[24] A study of the thermal characterization of a high Performance flip chip package
Bhopte, Siddharth
Sammakia, Bahgat
Calmidi, Varaprasad
2008 11TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, VOLS 1-3, 2008, : 302 - +
[25] Reliability studies of two flip-chip BGA packages using power cycling test
Qi, Q
MICROELECTRONICS RELIABILITY, 2001, 41 (04) : 553 - 562
[26] Influence of underfill and its material models on the reliability of flip chip package under thermal cycling
Chen, Liu
Zhang, Qun
Wang, Guo-Zhong
Xie, Xiao-Ming
Cheng, Zhao-Nian
Gongneng Cailiao/Journal of Functional Materials, 2001, 32 (05): : 480 - 483
[27] Static Voltage Drop and Current Density Analysis for High Performance FPGA Flip-chip Package Design
Tan, Siow Chek
Yew, Yee Huan
2014 9TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2014, : 109 - 112
[28] Numerical analysis of laser thermal compression bonding for flip chip package
Lee, Won Jae
Park, Jin Yeong
Nam, Hyun Jin
Choa, Sung-Hoon
2018 IEEE 20TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2018, : 383 - 386
[29] Development of an assembly process and reliability investigations for flip-chip LEDs using the AuSn soldering
G. Elger
M. Hutter
H. Oppermann
R. Aschenbrenner
H. Reichl
E. Jäger
Microsystem Technologies, 2002, 7 : 239 - 243
[30] Thermal deformation analysis on flip-chip packages using high resolution Moire interferometry
Wang, GT
Zhao, JH
Ding, M
Ho, PS
ITHERM 2002: EIGHTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, PROCEEDINGS, 2002, : 869 - 875

← 1 2 3 4 5 →