Numerical evaluation of thermal cycling reliability of high performance flip-chip package assembly using submodeling analysis

被引:4
|
作者
Kao, Chin-Li [1 ]
Lai, Yi-Shao [1 ]
Wang, Tong Hong [1 ]
机构
[1] Adv Semicond Engn Inc, Stress Reliabil lab, Kaohsiung 811, Taiwan
关键词
submodeling; finite element analysis; thermal cycling; high-performance flip-chip package;
D O I
10.1080/02533839.2007.9671262
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper applies the submodeling technique in analyzing thermal cycling reliability of high performance flip-chip ball grid array package assemblies. The packages have one-piece tunnel-type heat spreaders with different lead widths, connected to chips using different thermal interface materials. The global model contains no solder bumps to simplify the analysis. The calculated displacement field of the global model is then interpolated on the boundary of the submodel that contains the critical solder bump. The submodel is solved using the prescribed displacement boundary conditions together with external thermal loads to evaluate thermomechanical reliability of the critical solder bump.
引用
收藏
页码:349 / 352
页数:4
相关论文
共 50 条
  • [31] Development of an assembly process and reliability investigations for flip-chip LEDs using the AuSn soldering
    Elger, G
    Hutter, M
    Oppermann, H
    Aschenbrenner, R
    Reichl, H
    Jäger, E
    MICROSYSTEM TECHNOLOGIES, 2002, 7 (5-6) : 239 - 243
  • [32] Effect of underfill thermomechanical properties on thermal cycling fatigue reliability of flip-chip ball grid array
    Wang, TH
    Lai, YS
    Wu, JD
    JOURNAL OF ELECTRONIC PACKAGING, 2004, 126 (04) : 560 - 564
  • [33] Evaluation of thermal shear strains in flip-chip package by electronic speckle pattern interferometry (ESPI)
    Jang, WS
    Lee, BW
    Kim, DW
    Nah, JW
    Paik, KW
    Kwon, DG
    ADVANCES IN ELECTRONIC MATERIALS AND PACKAGING 2001, 2001, : 310 - 314
  • [34] In-situ moire measurement of adhesive flip-chip bonded assembly under thermal cycling condition
    Ham, SJ
    Kwon, WS
    Paik, KW
    Lee, SB
    POLYTRONIC 2002: 2ND INTERNATIONAL IEEE CONFERENCE ON POLYMERS AND ADHESIVES IN MICROELECTRONICS AND PHOTONICS, CONFERENCE PROCEEDINGS, 2002, : 63 - 67
  • [35] Improving the component level reliability of a flip-chip Ball-Grid-Array (FCBGA) package using numerical modeling method
    Qi, Quan
    ICEPT: 2007 8TH INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING TECHNOLOGY, PROCEEDINGS, 2007, : 586 - 590
  • [36] Reliability Evaluation for Flip-Chip Electronic Packages under High Temperature and Moisture Condition using Moire
    Park, Jin-Hyoung
    Jang, Kyung-Woon
    Paik, Kyung-Wook
    Lee, Soon-Bok
    EPTC: 2008 10TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS 1-3, 2008, : 633 - 638
  • [37] Failure Localization on the Open Circuit for a High Density Ceramic Flip-Chip Package after Reliability Test
    Li Han
    Zheng Hongyu
    Zhang Xiaojun
    2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2018, : 247 - 251
  • [38] Evaluation of solder joint reliability in flip chip package under thermal shock test
    Kim, DG
    Kim, JW
    Jung, SB
    THIN SOLID FILMS, 2006, 504 (1-2) : 426 - 430
  • [39] Evaluation of interfacial fracture toughness of a flip-chip package and a bimaterial system by a combined experimental and numerical method
    Wang, JJ
    Zou, DQ
    Lu, MF
    Ren, W
    Liu, S
    ENGINEERING FRACTURE MECHANICS, 1999, 64 (06) : 781 - 797
  • [40] Millimeter-wave flip-chip MMIC structure with high performance and high reliability interconnects
    Ito, M
    Maruhashi, K
    Kusamitsu, H
    Morishita, Y
    Ohata, K
    IEICE TRANSACTIONS ON ELECTRONICS, 1999, E82C (11): : 2038 - 2043