Design of area-efficient GHz range current mode frequency synthesizer using standard CMOS technology

被引:0
|
作者
Zheng, Dan-Dan [1 ]
Li, Yu-Bin [1 ]
Wang, Chang-Qi [1 ]
Huang, Kai [1 ]
Yu, Xiao-Peng [1 ]
机构
[1] Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China
关键词
frequency-locked loop; CMOS; integrated circuit; active inductor; PHASE-LOCKED LOOPS; ACTIVE INDUCTOR;
D O I
10.2478/jee-2019-0063
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, an area and power efficient current mode frequency synthesizer for system-on-chip (SoC) is proposed. A current-mode transformer loop filter suitable for low supply voltage is implemented to remove the need of a large capacitor in the loop filter, and a current controlled oscillator with additional voltage based frequency tuning mechanism is designed with an active inductor. The proposed design is further integrated with a fully programmable frequency divider to maintain a good balance among output frequency operating range, power consumption as well as silicon area. A test chip is implemented in a standard 0.13 mu m CMOS technology, measurement result demonstrates that the proposed design has a working range from 916 MHz to 1.1 lGHz and occupies a silicon area of 0.25 mm(2) while consuming 8.4 mW from a 1.2 V supply.
引用
收藏
页码:323 / 328
页数:6
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