Thermal Modeling of 3-D Stacked DRAM Over SiGe HBT BiCMOS CPU

被引:0
|
作者
Clarke, Ryan [1 ]
Jacob, Philip [2 ]
Erdogan, Okan [3 ]
Belemijian, Paul [4 ]
Raman, Srikumar [1 ]
Leroy, Mitchell R. [1 ]
Neogi, Tuhin Guha [5 ]
Kraft, Russell P. [1 ]
Borca-Tasciuc, Diana-Andra [6 ]
McDonald, John F. [1 ]
机构
[1] Rensselaer Polytech Inst, Ctr Integrated Elect, Troy, NY 12180 USA
[2] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[3] Istanbul Tech Univ, Natl High Performance Ctr Turkey, TR-34469 Istanbul, Turkey
[4] Naval Res Lab, Baltimore, MD 21227 USA
[5] GlobalFoundries, Malta, NY 12020 USA
[6] Rensselaer Polytech Inst, Dept Mech Aerosp & Nucl Engn, Troy, NY 12180 USA
来源
IEEE ACCESS | 2015年 / 3卷
基金
美国国家科学基金会;
关键词
Microprocessors; memory; simulation; modeling; Moore's law; 3D IC; thermal management; thermal analysis; DIAMOND; CONDUCTIVITY;
D O I
10.1109/ACCESS.2015.2396474
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
We have previously evaluated the feasibility of a serial code accelerator core with 3-D DRAM stacked on the core operating at high frequencies. While operating at such high frequencies (> 24 GHz), there are concerns with removing heat from the 3-D stack. We propose the use of thin diamond sheets, which have high thermal conductivity, as a heat spreader by bonding it close to the processor core substrate and memory stacks. We show, through thermal modeling using COMSOL finite-element analysis tools, the feasibility of diamond as an effective heat spreader in a processor-memory 3-D stack.
引用
收藏
页码:43 / 54
页数:12
相关论文
共 50 条
  • [41] 3D stacked capacitor cell for Mega bit DRAM
    Nakano, Tomio
    Yabu, Takashi
    Fujitsu Scientific and Technical Journal, 1988, 24 (04): : 301 - 317
  • [42] Thermal Aware 3-D Floorplanning on Multi-stacked Board of Smart Phone
    Cho, Youngsang
    Choi, Heejung
    Lee, Heeseok
    Im, Yunkyeok
    Lee, Hoijin
    Shin, Youngmin
    PROCEEDINGS OF THE NINETEENTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2020), 2020, : 636 - 641
  • [43] Signal and Thermal Integrity Analysis of 3-D Stacked Resistive Random Access Memories
    Fakhreddine, Zayer
    Lahbacha, Khitem
    Melnikov, Alexander
    Belgacem, Hamdi
    de Magistris, Massimiliano
    Dghais, Wael
    Maffucci, Antonio
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 68 (01) : 88 - 94
  • [44] Thermal Transient Analysis and Dynamic Temperature Control Algorithm for 3-D Stacked Chips
    Wang, Songxiang
    Usami, Kimiyoshi
    2022 37TH INTERNATIONAL TECHNICAL CONFERENCE ON CIRCUITS/SYSTEMS, COMPUTERS AND COMMUNICATIONS (ITC-CSCC 2022), 2022, : 614 - 617
  • [45] 3-D modeling
    McHugh, Randy
    Printed Circuit Design, 1998, 15 (02):
  • [46] Thermal Simulation of 3-D Stacked Integrated Circuits with Layered Finite Element Method
    Li, Bo
    Tang, Min
    Zhi, Yuwen
    Yu, Huixian
    2019 PHOTONICS & ELECTROMAGNETICS RESEARCH SYMPOSIUM - FALL (PIERS - FALL), 2019, : 1883 - 1886
  • [47] Modeling thermal stresses in 3-D IC interwafer interconnects
    Zhang, Jing
    Bloomfield, Max O.
    Lu, Jian-Qiang
    Gutmann, Ronald J.
    Cale, Timothy S.
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2006, 19 (04) : 437 - 448
  • [48] 3-D Modeling of Common Mode Choke for Thermal Analysis
    Liu, Yong
    See, Kye Yak
    Simanjorang, Rejeki
    2017 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2017, : 79 - 81
  • [49] Thermal-Aware Memory Management Unit of 3D-Stacked DRAM for 3D High Definition (HD) Video
    Chang, Chih-Yuan
    Huang, Po-Tsang
    Chen, Yi-Chun
    Chang, Tian-Sheuan
    Hwang, Wei
    2014 27TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2014, : 76 - 81
  • [50] 3-D Mixed-Mode Simulation of Single Event Transients in SiGe HBT Emitter Followers and Resultant Hardening Guidelines
    Wei, Xiaoyun
    Zhang, Tong
    Niu, Guofu
    Varadharajaperumal, Muthubalan
    Cressler, John D.
    Marshall, Paul W.
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2008, 55 (06) : 3360 - 3366