共 50 条
- [1] GATE-LEVEL INFORMATION-FLOW TRACKING FOR SECURE ARCHITECTURES [J]. IEEE MICRO, 2010, 30 (01) : 92 - 100
- [3] Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking [J]. PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017,
- [4] Static Gate-Level Information Flow for Hardware Information Security with Bounded Model Checking [J]. 2024 IEEE 42ND VLSI TEST SYMPOSIUM, VTS 2024, 2024,
- [5] Software-based Gate-level Information Flow Security for IoT Systems [J]. 50TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2017, : 328 - 340
- [7] Tracking Data Flow at Gate-Level through Structural Checking [J]. 2016 INTERNATIONAL GREAT LAKES SYMPOSIUM ON VLSI (GLSVLSI), 2016, : 185 - 189
- [8] Security Order of Gate-Level Masking Schemes [J]. 2023 IEEE INTERNATIONAL SYMPOSIUM ON HARDWARE ORIENTED SECURITY AND TRUST, HOST, 2023, : 57 - 67