Dual Workfunction Hetero Gate Dielectric Tunnel Field-Effect Transistor Performance Analysis

被引:0
|
作者
Yadav, Dharmendra Singh [1 ]
Sharma, Dheeraj [1 ]
Raad, Bhagwan Ram [1 ]
Bajaj, Varun [1 ]
机构
[1] PDPM Indian Inst Informat Technol Design & Mfg Ja, Discipline Elect & Commun Engn, Jabalpur 482005, MP, India
关键词
Band to band tunneling; gate to drain capacitance; gate to source capacitance; hetero gate dielectric; source pocket; work function engineering; FET;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper features a study of DC and analog/RF response of dual work function hetero gate dielectric source pocket tunnel field-effect transistor (DW HGD SP TFET). For this, source pocket is used to enhance the tunneling of charge carrier results in increment in ON-state current. Further, the hetero gate dielectric is used to reduce the gate to drain capacitance which is a crucial parameter for RF performance determination. At the same time, work function engineering is useful to enhance the device performance in terms of ON-state current which influences the analog/RF performance but it is also increases the gate to drain capacitance which limits the RF parameters. Thus, combination of hetero gate dielectric and work function engineering provides an integrated effect on the device RF performance. In this regards, RF parameters such as transconductance, cutoff frequency, gain bandwidth product and transit time are calculated to analysis the device suitability in wireless communication.
引用
收藏
页码:26 / 29
页数:4
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