A fast algorithm and hardware implementation for rate-distortion optimization in JPEG2000

被引:0
|
作者
Zhuang, HY [1 ]
Wu, CK [1 ]
Deng, JX [1 ]
机构
[1] Xidian Univ, Natl Key Lab Integrated Serv Network, Xian 710071, Peoples R China
关键词
D O I
10.1109/ICME.2004.1394537
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A fast algorithm for T-2 encoder in JPEG2000 suitable for hardware implementation is presented in this paper, based on the elaborate analysis of rate-distortion optimization algorithm. By reducing calculative complexity, the difficulty of hardware implementation for T2 encoder is reduced, and the parallelizability of the JPEG2000 hardware system is enhanced. The experimental results show that the final code stream is accorded with the standard format of JPEG2000 and reconstructed image quality decreases little. The system has been implemented on FPGA.
引用
收藏
页码:1527 / 1530
页数:4
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