Generating complete and optimal march tests for linked faults in memories

被引：8
|
作者：
Al-Harbi, SM [1 ]
Gupta, SK [1 ]
机构：
[1] Kuwait Univ, Dept Comp Engn, Khaledeyyah, Kuwait, Kuwait
来源：
21ST IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/VTEST.2003.1197659
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We show that no published march test detects all march-test detectable instances of linked faults in memories. We present necessary and sufficient conditions for detection of single cell linked faults. We identify the set of faults that are undetectable by march tests. We also present sets of faults that dominate all march-test detectable instances of linked multiple cell faults along with the necessary and sufficient conditions for their detection. Using a test generator that takes these conditions as input, we generate the first march tests that detect all march-test detectable linked faults. By considering the subsets of linked faults targeted by the well-known March A and March B tests, we also prove that these well-known tests are optimal for the corresponding sets of target faults.
引用
收藏
页码：254 / 261
页数：8
相关论文
共 50 条
  • [1] March tests for realistic faults in two-port memories
    Hamdioui, S
    Rodgers, M
    van de Goor, AJ
    Eastwick, D
    [J]. RECORDS OF THE 2000 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING, 2000, : 73 - 78
  • [2] Minimal march tests for dynamic faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. ETS 2006: ELEVENTH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS, 2006, : 43 - +
  • [3] Linked Coupling Faults Detection by Multirun March Tests
    Mrozek, Ireneusz
    Yarmolik, Vyacheslav N.
    [J]. APPLIED SCIENCES-BASEL, 2024, 14 (06):
  • [4] Minimal march tests for detection of dynamic faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2007, 23 (01): : 55 - 74
  • [5] Minimal march tests for unlinked static faults in Random Access Memories
    Harutunyan, G
    Vardanian, VA
    Zorian, Y
    [J]. 23RD IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2005, : 53 - 59
  • [6] Minimal March Tests for Detection of Dynamic Faults in Random Access Memories
    G. Harutunyan
    V. A. Vardanian
    Y. Zorian
    [J]. Journal of Electronic Testing, 2007, 23 : 55 - 74
  • [7] Automatic march tests generations for Static Linked Faults in SRAMs
    Benso, A.
    Bosio, A.
    Di Carlo, S.
    Di Natale, G.
    Prinetto, P.
    [J]. 2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 1258 - +
  • [8] An efficient methodology for generating optimal and uniform march tests
    Al-Harbi, SM
    Gupta, SK
    [J]. 19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2001, : 231 - 237
  • [9] A new framework for generating optimal march tests for memory arrays
    Zarrineh, K
    Upadhyaya, SJ
    Chakravarty, S
    [J]. INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS, 1998, : 73 - 82
  • [10] Minimal march test algorithm for detection of linked static faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. 24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2006, : 120 - +
12345