共 50 条
- [1] An efficient methodology for generating optimal and uniform march tests [J]. 19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2001, : 231 - 237
- [3] Generating complete and optimal march tests for linked faults in memories [J]. 21ST IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2003, : 254 - 261
- [5] An optimal algorithm for the automatic generation of march tests [J]. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS, 2002, : 938 - 943
- [6] Fast March Tests for Defects in Resistive Memory [J]. PROCEEDINGS OF THE 2015 IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH 15), 2015, : 88 - 93
- [9] Automatic generation of symmetric transparent March memory tests [J]. EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS IN MICROELECTRONICS, 2003, : 226 - 229
- [10] Generating Litmus Tests for Contrasting Memory Consistency Models [J]. COMPUTER AIDED VERIFICATION, PROCEEDINGS, 2010, 6174 : 273 - 287