Minimal March Tests for Detection of Dynamic Faults in Random Access Memories

被引:0
|
作者
G. Harutunyan
V. A. Vardanian
Y. Zorian
机构
[1] Virage Logic,
[2] Virage Logic,undefined
来源
关键词
random access memories; dynamic fault primitives; dynamic functional fault models; march test algorithms; fault detection;
D O I
暂无
中图分类号
学科分类号
摘要
The class of dynamic faults has been recently shown to be an important class of faults for the new technologies of Random Access Memories (RAM) with significant impact on defect-per-million (DPM) levels. Very little research has been done in the design of memory test algorithms targeting dynamic faults. Two March test algorithms of complexity 11N and 22N, N is the number of memory cells, for subclasses of two-operation single-cell and two-cell dynamic faults, respectively, were proposed recently [Benso et al., Proc., ITC 2005] improving the length of the corresponding tests proposed earlier [Hamdioui et al., Proc. of IEEE VLSI Test Symposium, pp. 395–400, 2002]. Also, a March test of length 100N was proposed [Benso et al., Proc. ETS 2005, Tallinn, pp. 122–127, 2005] for detection of two-cell dynamic faults with two fault-sensitizing operations both applied on the victim or aggressor cells. In this paper, for the first time, March test algorithms of minimum length are proposed for two-operation single-cell and two-cell dynamic faults. In particular, the previously known March test algorithm of length 100N for detection of two-operation two-cell dynamic faults is improved by 30N.
引用
收藏
页码:55 / 74
页数:19
相关论文
共 50 条
  • [1] Minimal march tests for detection of dynamic faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2007, 23 (01): : 55 - 74
  • [2] Minimal march tests for dynamic faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. ETS 2006: ELEVENTH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS, 2006, : 43 - +
  • [3] Minimal march tests for unlinked static faults in Random Access Memories
    Harutunyan, G
    Vardanian, VA
    Zorian, Y
    [J]. 23RD IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2005, : 53 - 59
  • [4] Minimal march test algorithm for detection of linked static faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. 24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2006, : 120 - +
  • [5] Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests
    Said Hamdioui
    Zaid Al-Ars
    Ad J. van de Goor
    Mike Rodgers
    [J]. Journal of Electronic Testing, 2003, 19 : 195 - 205
  • [6] Dynamic faults in random-access-memories: Concept, fault models and tests
    Hamdioui, S
    Al-Ars, Z
    van de Goor, AJ
    Rodgers, M
    [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2003, 19 (02): : 195 - 205
  • [7] Testing static and dynamic faults in random access memories
    Hamdioui, S
    Al-Ars, Z
    van de Goor, AJ
    [J]. 20TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2002, : 395 - 400
  • [8] A MARCH TEST FOR FUNCTIONAL FAULTS IN SEMICONDUCTOR RANDOM-ACCESS MEMORIES
    SUK, DS
    REDDY, SM
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1981, 30 (12) : 982 - 985
  • [9] Efficient march test for 3-coupling faults in random access memories
    Cascaval, P
    Bennett, S
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 2001, 24 (10) : 501 - 509
  • [10] Minimal march-based fault location algorithm with partial diagnosis for all static faults in random access memories
    Harutunyan, G.
    Vardanian, V. A.
    Zorian, Y.
    [J]. PROCEEDINGS OF THE 2006 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2006, : 262 - +