Cryogenic Characterization of 16 nm FinFET Technology for Quantum Computing

被引：8

作者：

Han, Hung-Chi ^{[1
]}

Jazaeri, Farzan ^{[1
]}

D'Amico, Antonio ^{[1
]}

Baschirotto, Andrea ^{[2
]}

Charbon, Edoardo ^{[1
]}

Enz, Christian ^{[1
]}

机构：

[1] Ecole Polytech Fed Lausanne EPFL, Lausanne, Switzerland

[2] Univ Milano Bicocca, Milan, Italy

来源：

IEEE 51ST EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2021) | 2021年

基金：

欧盟地平线“2020”;

关键词：

Tri-gate FinFET; Cryogenic CMOS; Quantum Computing; Compact Modeling; MOBILITY; CMOS;

D O I：

10.1109/ESSDERC53440.2021.9631805

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This study presents the first in depth characterization of deep cryogenic electrical behavior of a commercial 16nm CMOS FinFET technology. This technology is well suited for a broad range of applications, including quantum computing, quantum sensing, and quantum communications. Cryogenic DC measurements and physical parameters extraction were carried out on this commercial FinFET technology, operating at room temperature, i.e., 300 K, and down to 2.95K for different device types and geometries. This represents the main step towards cryogenic compact modeling and optimization of three-dimensional CMOS structures for quantum computations.

引用

页码：71 / 74

页数：4

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