Verilog and VHDL going analog

被引：0

|

作者：

不详

机构：

来源：

COMPUTER DESIGN | 1997年 / 36卷 / 02期

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

收藏

页码：40 / 40

页数：1

相关论文

共 50 条

[1] VHDL and Verilog fundamentals
EDN, 3 (163):
[2] VHDL - Mentor masters graphical entry for VHDL/Verilog
Mann, D
ELECTRONIC ENGINEERING, 1997, 69 (843): : 27 - 27
[3] THE VERILOG VHDL WARS ARE ENDING
COOLEY, J
EDN, 1994, 39 (12) : 228 - 228
[4] VERILOG-VHDL INTEROPERABILITY
BERMAN, V
CAPLOW, S
ELECTRONIC DESIGN, 1994, 42 (16) : 68 - 69
[5] VHDL & Verilog compared & contrasted - Plus modeled example written in VHDL, Verilog and C.
Smith, DJ
33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996, 1996, : 771 - 776
[6] Verilog-VHDL Simulation Interoperability
胡燕翔
刘明业
Journal of Beijing Institute of Technology(English Edition), 2003, (English Edition) : 124 - 128
[7] Verilog-VHDL Simulation Interoperability
胡燕翔
刘明业
Journal of Beijing Institute of Technology, 2003, (S1) : 124 - 128
[8] FPGAS SUIT VERILOG AND VHDL SYNTHESIS
GALLANT, J
EDN, 1995, 40 (21) : 20 - 20
[9] MIXING VHDL AND VERILOG HDL MODELS
FAZAKERLY, W
COMPUTER DESIGN, 1993, 32 (08): : A20 - &
[10] GATEWAY TO SUPPORT VHDL ON VERILOG XL
HARDING, B
COMPUTER DESIGN, 1989, 28 (10): : 23 - 23

← 1 2 3 4 5 →