Trinary magnitude comparator using SLM based Savart plate

被引:3
|
作者
Bhattacharya, Animesh [1 ]
Das, Shyandeep [1 ]
Sarkar, Arijit [1 ]
Bose, Nabanita [1 ]
Ghosh, Amal K. [1 ]
机构
[1] Netaji Subhash Engn Coll, Dept Appl Elect & Instrumentat Engn, Kolkata 700152, India
关键词
LIGHT-MODULATOR SLM; LOGIC; BINARY;
D O I
10.1007/s11801-019-9029-x
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
The demand of present technology inviting the popularity of multivalued optical computation system to coup up with the latest scenario of ultrahigh processing speed and handling large amount of data The magnitude comparator is the heart of the arithmetic and logic unit (ALU) in any logical processing and computing system. In this paper, a trinary magnitude comparator circuit has been proposed and implemented with modified trinary number (MTN) system. Optical tree architecture (OTA) of the proposed circuit has been realized reasonably using Savart plate and spatial light modulators (SLM). A simulation algorithm has also been developed and implemented to prove the authenticity of the proposed circuit through the simulation.
引用
收藏
页码:415 / 419
页数:5
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