TAC: Testing Time Reduction for Digitally-Calibrated Designs

被引:0
|
作者
Chang, Hsiu-Ming [1 ]
Cheng, Kwang-Ting [1 ]
机构
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
For digitally-calibrated analog, mixed-signal and radio-frequency (AMS/RF) circuits, it is desirable to stop the calibration process as soon as it reaches convergence. Such a strategy can avoid wasting unnecessary calibration time and ensure high calibration quality during production testing. However, due to the lack of systematic methods for convergence detection, existing digitally-calibrated designs simply allot a fixed and sufficiently long period of time for calibration. In this paper, we propose a method to reduce testing time by terminating calibration at convergence for circuits that employ the least-mean-square (LMS) algorithm for built-in calibration. We observe the fluctuation range of the tap coefficients in the digital calibration unit to determine whether the convergence criteria are met and subsequently terminate the calibration process. We conduct two case studies - a digitally-calibrated pipelined ADC and a digitally-calibrated image-reject receiver - to demonstrate the generality and effectiveness of our proposed method. In comparison with the existing termination policy, our proposed method, on average, can reduce the calibration time by 70%.
引用
收藏
页码:46 / 51
页数:6
相关论文
共 50 条
  • [41] Observation time reduction for IDDQ testing of bridging faults in sequential circuits
    Higami, Y
    Saluja, KK
    Kinoshita, K
    SEVENTH ASIAN TEST SYMPOSIUM (ATS'98), PROCEEDINGS, 1998, : 312 - 317
  • [42] Pill-testing as a harm reduction strategy: time to have the conversation
    Morgan, Jody
    Jones, Alison
    MEDICAL JOURNAL OF AUSTRALIA, 2019, 211 (10) : 447 - +
  • [43] Implementation of Monotonicity Testing Utilizing On Chip Resources for Test Time Reduction
    Hemanthkumar, V
    2022 IEEE INTERNATIONAL TEST CONFERENCE INDIA (ITC INDIA), 2022,
  • [44] A Complete Fossil-Calibrated Phylogeny of Seed Plant Families as a Tool for Comparative Analyses: Testing the 'Time for Speciation' Hypothesis
    Harris, Liam W.
    Davies, T. Jonathan
    PLOS ONE, 2016, 11 (10):
  • [45] Side Lobe Levels Reduction in Digitally Optimized Time Modulated Linear Arrays Using Particle Swarm Optimization Technique
    Singh, Harshavardhan
    Mandal, S. K.
    2014 STUDENTS CONFERENCE ON ENGINEERING AND SYSTEMS (SCES), 2014,
  • [46] Real-Time Low-Cost Multipath Mitigation Technique Calibrated through Real Data Repeatable Testing
    Fortin, Marc-Antoine
    Guay, Jean-Christophe
    Landry, Rene Jr
    PROCEEDINGS OF THE 22ND INTERNATIONAL TECHNICAL MEETING OF THE SATELLITE DIVISION OF THE INSTITUTE OF NAVIGATION (ION GNSS 2009), 2009, : 2316 - 2328
  • [47] A Multi-Code Compression Scheme for Test Time Reduction of System-on-Chip Designs
    Shieh, Hong-Ming
    Li, Jin-Fu
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2008, E91D (10) : 2428 - 2434
  • [48] A Fast-Locking All-Digital Phased-Locked Loop with a 1 ps Resolution Time-to-Digital Converter Using Calibrated Time Amplifier and Interpolation Digitally-Controlled-Oscillator
    Chu, Hsing-Chien
    Hua, Yi-Hsiang
    Hung, Chung-Chih
    2016 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2016, : 375 - 378
  • [49] Testing time-invariance of variable specificity in repeated measure designs using structural equation modeling
    Raykov, Tenko
    Amemiya, Yasuo
    STRUCTURAL EQUATION MODELING-A MULTIDISCIPLINARY JOURNAL, 2008, 15 (03) : 449 - 461
  • [50] A field forcing method for reduction of characterization time when testing synchronous machines
    Istselemov D.A.
    Lyubimov E.V.
    Russian Electrical Engineering, 2014, 85 (11) : 649 - 653