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- [41] Observation time reduction for IDDQ testing of bridging faults in sequential circuits SEVENTH ASIAN TEST SYMPOSIUM (ATS'98), PROCEEDINGS, 1998, : 312 - 317
- [43] Implementation of Monotonicity Testing Utilizing On Chip Resources for Test Time Reduction 2022 IEEE INTERNATIONAL TEST CONFERENCE INDIA (ITC INDIA), 2022,
- [45] Side Lobe Levels Reduction in Digitally Optimized Time Modulated Linear Arrays Using Particle Swarm Optimization Technique 2014 STUDENTS CONFERENCE ON ENGINEERING AND SYSTEMS (SCES), 2014,
- [46] Real-Time Low-Cost Multipath Mitigation Technique Calibrated through Real Data Repeatable Testing PROCEEDINGS OF THE 22ND INTERNATIONAL TECHNICAL MEETING OF THE SATELLITE DIVISION OF THE INSTITUTE OF NAVIGATION (ION GNSS 2009), 2009, : 2316 - 2328
- [48] A Fast-Locking All-Digital Phased-Locked Loop with a 1 ps Resolution Time-to-Digital Converter Using Calibrated Time Amplifier and Interpolation Digitally-Controlled-Oscillator 2016 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2016, : 375 - 378