Experimental gate misalignment analysis on double gate SOI MOSFETs

被引:21
|
作者
Widiez, J [1 ]
Daugé, F [1 ]
Vinet, M [1 ]
Poiroux, T [1 ]
Previtali, B [1 ]
Mouis, M [1 ]
Deleonibus, S [1 ]
机构
[1] CEA, DRT, LETI, F-38054 Grenoble 9, France
关键词
D O I
10.1109/SOI.2004.1391609
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
引用
收藏
页码:185 / 186
页数:2
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