Impact of SiN on performance in novel complementary metal-oxide-semiconductor architecture using substrate strained-SiGe and mechanical strained-Si technology

被引:1
|
作者
Lin, Chung Hsiung
Wu, San Lein
Wu, Chung Yi
Kang, Ting Kuo
Huang, Kuang Chih
Chang, Shoou Jinn
机构
[1] Cheng Shiu Univ, Dept Elect Engn, Kaohsiung 833, Taiwan
[2] Natl Cheng Kung Univ, Inst Microelect, Tainan 701, Taiwan
[3] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 701, Taiwan
关键词
tensile-strained Si; compressively strained SiGe; CMOS;
D O I
10.1143/JJAP.46.2882
中图分类号
O59 [应用物理学];
学科分类号
摘要
In this paper, we report the fabrication of a SiN-induced mechanically tensile-strained Si n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) and a compressively strained SiGe p-type MOSFET to improve the drive current of both nand pMOSFETs simultaneously, and we integrated both devices on the same wafer. Individual MOSFET performance can be adjusted independently to their optimum levels due to the separation process for two types of devices. It is found that n- and pMOSFETs in the novel complementary metal-oxide-semi conductor (CMOS) architecture had a better performance, not only a higher drain-to-source saturation current but also a higher transconductance with wide gate voltage swing, than the Si devices used as a control. Although a degraded performance was found in the pMOSFET with a SiN layer, this effect can be minimized by increasing the Ge content in the Si1-xGex conducting channel, thus demonstrating that the flow has a great flexibility for developing a next-generation high-performance CMOS devices.
引用
收藏
页码:2882 / 2886
页数:5
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