Evaluation of interface state density of strained-Si metal-oxide-semiconductor interfaces by conductance method

In this study, the application of the conductance method to bi-axially strained-Si (sSi) MOS capacitors on relaxed SiGe buffer layers is examined for evaluating the properties of sSi MOS interface states. It is found that the conventional conductance method does not work well for the characterization of SiO2/sSi MOS interfaces, because of additional parasitic admittance related to the sSi/SiGe hetero-interface. This additional parasitic admittance cannot be eliminated by the series resistance correction (SRC). A new equivalent circuit model for the SiO2/sSi interfaces, utilized in the conductance analysis, is proposed. The proposed model takes the sSi/SiGe hetero-interface parasitic admittance into account. By employing this new model and the analysis by a device simulator, physical parameters of the SiO2/sSi MOS interface states, generated by Fowler-Nordheim stress, are extracted. It is found that the introduced biaxial tensile strain does not strongly change the properties of SiO2/Si interface states. (C) 2014 AIP Publishing LLC.