Elimination of parasitic channels in strained-Si p-channel metal-oxide-semiconductor field-effect transistors

被引:8
|
作者
Sugii, N [1 ]
Yamaguchi, S [1 ]
Nakagawa, K [1 ]
机构
[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan
关键词
D O I
10.1088/0268-1242/16/3/306
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Strained-Si p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on strained-Si/relaxed-Si0.7Ge0.3 heterostructures grown using molecular-beam epitaxy. Device simulation suggested that parasitic conduction through the Si0.7Ge0.3 layer can be eliminated by adding a proper concentration of impurity (> 10(17) cm(-3)) near the interface between the Si and the Si0.7Ge0.3 layers. The switching characteristics of fabricated devices were improved by increasing the impurity density to 1.6 x 10(17) cm(-3) suggesting that the formation of parasitic channels can be eliminated by channel doping in state-of-the-art short-channel MOSFETs (>1 x 10(18) cm(-3)). Effective hole mobility in our best strained-Si p-MOSFET was 30% higher than the universal value for conventional p-MOSFETs.
引用
收藏
页码:155 / 159
页数:5
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