On the automatic generation of test programs for path-delay faults in microprocessor cores

被引：0

作者：

Bernardi, P. ^{[1
]}

Grosso, M. ^{[1
]}

Sanchez, E. ^{[1
]}

Reorda, M. Sonza ^{[1
]}

机构：

[1] Politecn Torino, Dipartimento Automat & Informat, Turin, Italy

来源：

ETS 2007: 12TH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS | 2007年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Delay testing is mandatory for guaranteeing the correct behavior of today's high-performance microprocessors. Several methodologies have been proposed to tackle this issue resorting to additional hardware or to software self-test techniques. Software techniques are particularly promising as they resort to Assembly programs in normal mode of operation, without requiring circuit modifications; however, the problem of generating effective and efficient test programs for path-delay fault detection is still open. This paper presents an innovative approach for the generation of path-delay self-test programs for microprocessors, based on an evolutionary algorithm and on ad-hoc software simulation/hardware emulation heuristic techniques. Experimental results show how the proposed methodology allows generating suitable test programs in reasonable times.

引用

页码：179 / +

页数：2

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