Modeling of hole confinement gate voltage range for SiGe channel p-MOSFETs

被引：4
|
作者：
Niu, GF
Ruan, G
Zhang, DH
机构：
[1] Department of Electronic Engineering, Fudan University
来源：
SOLID-STATE ELECTRONICS | 1996年 / 39卷 / 01期
关键词：
D O I：
10.1016/0038-1101(95)00101-X
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An analytical model of hole confinement gate voltage range is derived for SiGe-channel p-MOSFETs and verified by SEDAN-3 simulation. The hole confinement gate voltage range is shown to be a function of threshold voltage, gate oxide thickness to Si cap thickness ratio, gate material, and Ge mole fraction. Si cap should be thinned with device scaling and power supply decreasing to keep the same hole confinement so as to realise full bias range SiGe-channel operation. It is clarified that various bulk and SOI SiGe p-MOSFETs have the same hole confinement under the same threshold voltage.
引用
收藏
页码：69 / 73
页数：5
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