4H-SiC lateral double RESURF MOSFETs with low ON resistance

被引：0

作者：

Noborio, Masato ^{[1
]}

Suda, Jun ^{[1
]}

Kimoto, Tsunenobu ^{[1
]}

机构：

[1] Kyoto Univ, Dept elect Sci & Engn, Kyoto 6158510, Japan

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2007年 / 54卷 / 05期

基金：

日本学术振兴会;

关键词：

breakdown voltage; device simulation; MOSFET; ON resistance; reduced surface field (RESURF); silicon carbide (SiC);

D O I：

10.1109/TED.2007.894249

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Designing and fabrication of 4H-SiC (0001) lateral MOSFETs with a double reduced surface field (RESURF) structure have been investigated to reduce ON resistance. In order to achieve high breakdown voltage, a two-zone RESURF structure was also employed in addition to the double RESURF structure. The simulated double RESURF MOSFETs with optimum doses exhibit slightly higher breakdown voltage and lower drift resistance than the simulated single RESURF MOSFETs. The double RESURF structure is attractive to suppress oxide breakdown at gate edge. After the device simulation for dose optimization, the 4H-SiC two-zone double RESURF MOSFETs have been fabricated by using a self-aligned process. The fabricated MOSFET has demonstrated a high breakdown voltage. of 1380 V and a low ON resistance of 66 m Omega . cm(2) (including a drift resistance of 24 m Omega . cm(2)). The drift resistance of the fabricated double RESURF MOSFETs is only 50% or even lower than that of the single RESURF MOSFETs.

引用

页码：1216 / 1223

页数：8

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