Performance Evaluation of Buffer Sharing Routers for Network on Chip

Packet buffers in Network on Chips (NoCs) are the most expensive resource for its power and area consumption. Most of the applications that run based on NoC platforms have different traffic patterns. The packets of these traffics are generally not uniformly distributed on routers buffers, hence, many buffers will be inefficiently utilized. This paper presents buffer sharing architectures for NoC routers, which can reduce the sizes of NoC routers' buffers. We analyze two router architectures: Four-Port Buffer Sharing (4PBS) router and Two-Port Buffer Sharing (2PBS) router. Performance evaluation shows that 4PBS router outperforms 2PBS router in the delay and throughput of packet delivery while 2PBS incurs lower overhead in the controller complexity and power overhead.