Design of a High-Throughput Low-Latency Extended Golay Decoder

被引：0

作者：

Zhang, Pengwei ^{[1
,2
]}

Lau, Francis C. M. ^{[1
,2
]}

Sham, Chiu-W ^{[3
]}

机构：

[1] Hong Kong Polytech Univ, Dept Elect & Informat Engn, Hong Kong, Hong Kong, Peoples R China

[2] Hong Kong Polytech Univ, Shenzhen Res Inst, Hong Kong, Hong Kong, Peoples R China

[3] Univ Auckland, Dept Comp Sci, Auckland, New Zealand

来源：

2017 23RD ASIA-PACIFIC CONFERENCE ON COMMUNICATIONS (APCC): BRIDGING THE METROPOLITAN AND THE REMOTE | 2017年

关键词：

CODE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose a parallel architecture of the imperfect maximum likelihood decoding (IMLD) method, called PIMLD. It is further implemented onto an FPGA and applied to decode the (24, 12, 8) extended Golay code. Experimental results show that the proposed PIMLD decoder achieves 12.0 Gb/s throughput at 500 MHz frequency. Moreover, the latency for the decoder is only 5 clock cycles.

引用

页码：524 / 527

页数：4

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