A Post-silicon Debug Support Using High-level Design Description

被引：0

作者：

Lee, Yeonbok ^{[1
]}

Nishihara, Tasuku ^{[2
]}

Matsumoto, Takeshi ^{[3
]}

Fujita, Masahiro ^{[3
]}

机构：

[1] Univ Tokyo, Dept Elect Engn & Informat Syst, Tokyo 1138654, Japan

[2] Univ Tokyo, Dept Elect Engn, Tokyo 1138654, Japan

[3] Univ Tokyo, VLSI Design & Educ Ctr, Tokyo 1138654, Japan

来源：

2009 ASIAN TEST SYMPOSIUM, PROCEEDINGS | 2009年

关键词：

HW design debug; post-silicon debug; high-level design;

D O I：

10.1109/ATS.2009.28

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we propose a post-silicon debug framework utilizing high-level design description, which provides great advantage of comprehensibility and readability in analyzing erroneous behaviors for debugging complicated post-silicon errors. The framework consists of the following methods.; mapping between high-level and RTL, extracting error-relevant portions, and rank them by the degree of relevance with the error. We also exhibit several experimental results to show its effectiveness.

引用

页码：137 / +

页数：2

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