Transitioning Spiking Neural Network Simulators to Heterogeneous Hardware

被引:3
|
作者
Quang Anh Pham Nguyen [1 ,2 ]
Andelfinger, Philipp [1 ,2 ]
Tan, Wen Jun [1 ,2 ]
Cai, Wentong [2 ]
Knoll, Alois [2 ,3 ,4 ]
机构
[1] TUM Create Ltd, 1 Create Way 10-02 CREATE Tower, Singapore 138602, Singapore
[2] Nanyang Technol Univ, 50 Nanyang Ave, Singapore 639798, Singapore
[3] Tech Univ Munich, Munich, Germany
[4] Univ Munich, Arcisstr 21, D-80333 Munich, Germany
基金
新加坡国家研究基金会;
关键词
Spiking neural network simulators; types of simulation: parallel & heterogeneous; automatic code transformation; DOMAIN-SPECIFIC LANGUAGE; NEURONS; BRAIN;
D O I
10.1145/3422389
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Spiking neural networks (SNN) are among the most computationally intensive types of simulation models, with node counts on the order of up to 10(11). Currently, there is intensive research into hardware platforms suitable to support large-scale SNN simulations, whereas several of the most widely used simulators still rely purely on the execution on CPUs. Enabling the execution of these established simulators on heterogeneous hardware allows new studies to exploit the many-core hardware prevalent in modern supercomputing environments, while still being able to reproduce and compare with results from a vast body of existing literature. In this article, we propose a transition approach for CPU-based SNN simulators to enable the execution on heterogeneous hardware (e.g., CPUs, GPUs, and FPGAs), with only limited modifications to an existing simulator code base and without changes to model code. Our approach relies on manual porting of a small number of core simulator functionalities as found in common SNN simulators, whereas the unmodified model code is analyzed and transformed automatically. We apply our approach to the well-known simulator NEST and make a version executable on heterogeneous hardware available to the community. Our measurements show that at full utilization, a single GPU achieves the performance of about 9 CPU cores. A CPU-GPU co-execution with load balancing is also demonstrated, which shows better performance compared to CPU-only or GPU-only execution. Finally, an analytical performance model is proposed to heuristically determine the optimal parameters to execute the heterogeneous NEST.
引用
收藏
页数:26
相关论文
共 50 条
  • [21] Hardware aware modeling of mixed-signal spiking neural network
    Chowdhury, Sayma Nowshin
    Shah, Sahil
    2022 20TH IEEE INTERREGIONAL NEWCAS CONFERENCE (NEWCAS), 2022, : 104 - 108
  • [22] A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition
    Zhou, Xichuan
    Zhou, Zhenghua
    Zhong, Zhengqing
    Yu, Jianyi
    Wang, Tengxiao
    Tian, Min
    Jiang, Ying
    Shi, Cong
    2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
  • [23] Reconfigurable hardware evolution platform for a spiking neural network robotics controller
    Rocke, Patrick
    McGinley, Brian
    Morgan, Fearghal
    Maher, John
    RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS, 2007, 4419 : 373 - +
  • [24] A Heterogeneous Spiking Neural Network for Unsupervised Learning of Spatiotemporal Patterns
    She, Xueyuan
    Dash, Saurabh
    Kim, Daehyun
    Mukhopadhyay, Saibal
    FRONTIERS IN NEUROSCIENCE, 2021, 14
  • [25] SPANNER: A Self-Repairing Spiking Neural Network Hardware Architecture
    Liu, Junxiu
    Harkin, Jim
    Maguire, Liam P.
    McDaid, Liam J.
    Wade, John J.
    IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 2018, 29 (04) : 1287 - 1300
  • [26] In Situ Learning in Hardware Compatible Multilayer Memristive Spiking Neural Network
    Li, Jiwei
    Xu, Hui
    Sun, Sheng-Yang
    Li, Nan
    Li, Qingjiang
    Li, Zhiwei
    Liu, Haijun
    IEEE TRANSACTIONS ON COGNITIVE AND DEVELOPMENTAL SYSTEMS, 2022, 14 (02) : 448 - 461
  • [27] A Hybrid Spiking Recurrent Neural Network on Hardware for Efficient Emotion Recognition
    Zou, Chenglong
    Cui, Xiaoxin
    Kuang, Yisong
    Wang, Yuan
    Wang, Xinan
    2022 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2022): INTELLIGENT TECHNOLOGY IN THE POST-PANDEMIC ERA, 2022, : 332 - 335
  • [28] Effective calculations on neuromorphic hardware based on spiking neural network approaches
    Sboev A.G.
    Serenko A.V.
    Vlasov D.S.
    Lobachevskii Journal of Mathematics, 2017, 38 (5) : 964 - 966
  • [29] Rapid application prototyping for hardware modular spiking neural network architectures
    Sandeep Pande
    Fearghal Morgan
    Finn Krewer
    Jim Harkin
    Liam McDaid
    Brian McGinley
    Neural Computing and Applications, 2017, 28 : 2767 - 2779
  • [30] Minimally buffered deflection router for spiking neural network hardware implementations
    Liu, Junxiu
    Jiang, Dong
    Luo, Yuling
    Qiu, Senhui
    Huang, Yongchuang
    NEURAL COMPUTING & APPLICATIONS, 2021, 33 (18): : 11753 - 11764