A domain specific reconfigurable Viterbi fabric for system-on-chip applications

被引：0
|
作者：
Zhan, Cheng [1 ]
Arslan, Tughrul [1 ]
Khawam, Sami [1 ]
Lindsay, Iain [1 ]
机构：
[1] Univ Edinburgh, Sch Electron & Engn, Edinburgh EH9 3JL, Midlothian, Scotland
来源：
ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2005年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A novel embedded dynamically reconfigurable fabric for implementing the Viterbi algorithm in a System-on-Chip device is presented in this paper. The proposed reconfigurable fabric can support Viterbi implementations for different standards, such as GSM, IS-95, CDMA and Wireless LAN. Our results illustrate that the proposed architecture has superior power consumption and throughput characteristics and it is demonstrated a 80% reduction in power consumption over generic field programmable gate array (FPGA) and 40 times improvement in throughput over digital signal processor (DSP), respectively. Thus, the reconfigurable system-on-chip platform based on this kind of domain specific reconfigurable fabrics is an efficient solution for the high-performance portable communication systems.
引用
收藏
页码：916 / 919
页数：4
相关论文
共 50 条
  • [1] Domain specific reconfigurable fabric targeting Viterbi algorithm
    Zhan, C
    Khawam, S
    Arslan, T
    2004 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, 2004, : 363 - 366
  • [2] A reconfigurable computing processor core for multimedia system-on-chip applications
    Department of Electrical Engineering, National Chung Hsing University, No, 250, Kuo Kuang Road, Taichung, Taiwan
    Jpn J Appl Phys Part 1 Regul Pap Short Note Rev Pap, 4 B (3336-3342):
  • [3] A reconfigurable computing processor core for multimedia system-on-chip applications
    Lai, Yeong-Kang
    Chen, Lien-Fei
    Chen, Jian-Chou
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2006, 45 (4B): : 3336 - 3342
  • [4] Egret: a platform for reconfigurable system-on-chip
    Bergmann, NW
    Williams, JA
    MICROELECTRONICS: DESIGN, TECHNOLOGY, AND PACKAGING, 2004, 5274 : 295 - 302
  • [5] Enabling technologies for reconfigurable system-on-chip
    Bergmann, NW
    2002 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2002, : 360 - 363
  • [6] A reconfigurable architecture for DSP system-on-chip
    Dung, LR
    Lee, YL
    Wu, CM
    CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE, 2001, 26 (3-4): : 109 - 113
  • [7] SoCWire: A Network-on-Chip approach for Reconfigurable System-on-Chip designs in space applications
    Osterloh, B.
    Michalik, H.
    Fiethe, B.
    Kotarowski, K.
    PROCEEDINGS OF THE 2008 NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS, 2008, : 51 - 56
  • [8] On-chip communication architectures for reconfigurable system-on-chip
    Lee, AS
    Bergmann, NW
    2003 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2003, : 332 - 335
  • [9] On-chip interconnect schemes for reconfigurable system-on-chip
    Lee, AS
    Bergmann, NW
    MICROELECTRONICS: DESIGN, TECHNOLOGY, AND PACKAGING, 2004, 5274 : 442 - 453
  • [10] A Domain-Specific System-On-Chip Design for Energy Efficient Wearable Edge AI Applications
    Tuncel, Yigit
    Krishnakumar, Anish
    Chithra, Aishwarya L.
    Kim, Younghyun
    Ogras, Umit
    2022 ACM/IEEE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, ISLPED 2022, 2022,
12345