HfO2/HfSixOy high-K gate stack with very low leakage current for low-power poly-Si gated CMOS application

被引:1
|
作者
Yang, CW
Fang, YK [1 ]
Chen, SF
Wang, MF
Hou, TH
Lin, YM
Yao, LG
Chen, SC
Liang, MS
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Inst Microelect, VLSI Technol Lab, Tainan 70101, Taiwan
[2] Taiwan Semicond Mfg Co Ltd, Hsinchu, Taiwan
关键词
D O I
10.1049/el:20030445
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Poly-Si gated NMOSFETs, with HfO2/HfSixOy gate stacks for CMOS low-power application are reported for the first time. Compared to an SiO2 control sample, the HfO2/HfSixOy stack with equivalent oxide thickness of about 18 Angstrom exhibits four-orders of magnitude reduction in gate leakage at V-g = 1V Additionally, negligible hysteresis and comparable subthreshold swing are observed indicating good interface quality and bulk film properties. Furthermore, the stack-caused inherent transconductance degradation is small; almost 66% of the normalised peak transconductance with respect to SiO2 can be reached.
引用
收藏
页码:692 / 694
页数:3
相关论文
共 50 条
  • [31] High-performance poly-Si TFT with ultra-thin channel film and gate oxide for low-power application
    Chen, Yi-Hsuan
    Ma, William Cheng-Yu
    Chao, Tien-Sheng
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2015, 30 (10)
  • [32] Gate-Stack Engineering to Improve the Performance of 28 nm Low-Power High-K/Metal-Gate Device
    Park, Jeewon
    Jang, Wansu
    Shin, Changhwan
    MICROMACHINES, 2021, 12 (08)
  • [33] Complex impedance spectroscopy of high-k HfO2 thin films in Al/HfO2/Si capacitor for gate oxide applications
    Nath, Madhuchhanda
    Roy, Asim
    JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2015, 26 (06) : 3506 - 3514
  • [34] Complex impedance spectroscopy of high-k HfO2 thin films in Al/HfO2/Si capacitor for gate oxide applications
    Madhuchhanda Nath
    Asim Roy
    Journal of Materials Science: Materials in Electronics, 2015, 26 : 3506 - 3514
  • [35] Poly-Si gate CMOSFETs with HfO2-Al2O3 laminate gate dielectric for low power applications
    Lee, JH
    Kim, YS
    Jung, HS
    Lee, JH
    Lee, NI
    Kang, HK
    Ku, JH
    Kang, HS
    Kim, YK
    Cho, KH
    Sub, KP
    2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2002, : 84 - 85
  • [36] Dry Etching of Metal Inserted Poly-Si Stack for Dual High-k and Dual Metal Gate Integration
    Li, Yongliang
    Xu, Qiuxia
    Wang, Wenwu
    Zhang, Jing
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2018, 7 (08) : P435 - P439
  • [37] A highly manufacturable low power and high speed HfSiO CMOS FET - with dual poly-Si gate electrodes
    Iwamoto, T
    Ogura, T
    Terai, M
    Watanabe, H
    Watanabe, H
    Ikarashi, N
    Miyamura, M
    Tatsumi, T
    Saitoh, M
    Morioka, A
    Watanabe, K
    Saito, Y
    Yabe, Y
    Ikarashi, T
    Masuzaki, K
    Mochizuki, Y
    Mogami, T
    2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, 2003, : 639 - 642
  • [38] Dramatic reduction of gate leakage current in 1.61 nm HfO2 high-k dielectric poly-silicon gate with AI2O3 capping layer
    Yang, CW
    Fang, YK
    Chen, CH
    Wang, WD
    Lin, TY
    Wang, MF
    Hou, TH
    Cheng, JY
    Yao, LG
    Chen, SC
    Yu, CH
    Liang, MS
    ELECTRONICS LETTERS, 2002, 38 (20) : 1223 - 1225
  • [39] Characteristics of HfO2/Poly-Si Interfacial Layer on CMOS LTPS-TFTs With HfO2 Gate Dielectric and O2 Plasma Surface Treatment
    Ma, Ming-Wen
    Chiang, Tsung-Yu
    Wu, Woei-Cherng
    Chao, Tien-Sheng
    Lei, Tan-Fu
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (12) : 3489 - 3493
  • [40] Identification of electron trap location degrading low-frequency noise and PBTI in poly-Si/HfO2/interface-layer gate-stack MOSFETs
    Matsuki, T.
    Hettiarachchi, R.
    Feng, W.
    Shiraishi, K.
    Yamada, K.
    Ohmori, K.
    MICROELECTRONIC ENGINEERING, 2011, 88 (07) : 1421 - 1424