共 50 条
- [31] High-level modeling and verification of cellular signaling 2016 IEEE INTERNATIONAL HIGH LEVEL DESIGN VALIDATION AND TEST WORKSHOP (HLDVT), 2016, : 162 - 169
- [32] High-level verification of handwritten numeral strings XIV BRAZILIAN SYMPOSIUM ON COMPUTER GRAPHICS AND IMAGE PROCESSING, PROCEEDINGS, 2001, : 36 - 43
- [33] METACSL: Specification and Verification of High-Level Properties TOOLS AND ALGORITHMS FOR THE CONSTRUCTION AND ANALYSIS OF SYSTEMS, PT I, 2019, 11427 : 358 - 364
- [35] Design and Verification Using High-Level Synthesis 2016 21ST ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2016, : 198 - 203
- [36] Integration of high-level modeling, formal verification, and high-level synthesis in ATM switch design ELEVENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1997, : 552 - 557
- [37] High-level synthesis of pipelined circuits from modular queue-based specifications IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2001, E84A (11): : 2655 - 2664
- [40] Verifiable Control of Robotic Swarm from High-level Specifications PROCEEDINGS OF THE 17TH INTERNATIONAL CONFERENCE ON AUTONOMOUS AGENTS AND MULTIAGENT SYSTEMS (AAMAS' 18), 2018, : 568 - 576