A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS Process

被引：2

作者：

Palomeque-Mangut, David ^{[1
]}

Rodriguez-Vazquez, Angel ^{[1
]}

Delgado-Restituto, Manuel ^{[1
]}

机构：

[1] Univ Seville, Inst Microelect Sevilla IMSE CNM, CSIC, Seville, Spain

来源：

2022 IEEE 13TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS) | 2022年

关键词：

Floating level shifter; high voltage compliance; charge pump; LV CMOS; CHIP;

D O I：

10.1109/LASCAS53948.2022.9789044

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A high-voltage (HV) floating level shifter which slides digital signals by varying the low supply rail from ground to VSSH while preserving the input signal swing is proposed. The cell is based on a periodically-refreshed charge pump circuit and it is suitable for non-HV CMOS processes. Input signals can be non-periodic. The circuit has been designed and implemented in a standard 180nm 1.8V/3.3V CMOS node, occupying 0.02mm(2). Post-layout simulations show that VSSH voltage can safely range from 0.5V to 9.5V. The delay response of the circuit is 1.9 ns and it consumes 13.9 mu W.

引用

页码：109 / 112

页数：4

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