A self-calibrated multiphase DLL-based clock generator

被引:0
|
作者
Chen, Hsin-Shu [1 ]
Hung, Chao-Ching
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A delay-locked loop (DLL) integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mu m CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100MHz. The prototype circuit occupies an area of 2.1 mm(2), and consumes around 10.1mW at 3.3V.
引用
收藏
页码:172 / +
页数:2
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