2D modelling of nanoscale double gate silicon-on-insulator MOSFETs using conformal mapping

被引:24
|
作者
Kolberg, Sigbjorn [1 ]
Fjeldly, Tor A. [1 ]
机构
[1] Norwegian Univ Sci & Technol, Univ Grad Ctr UniK, N-2027 Kjeller, Norway
关键词
D O I
10.1088/0031-8949/2006/T126/013
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
This paper presents important issues related to the two-dimensional (2D) modelling of nanoscale, fully depleted double-gate silicon-on-insulator (SOI) MOSFETs in subthreshold and near-threshold operation. The modelling is based on the solution of Laplace's equation for the rectangular body using conformal mapping techniques. The model yields solutions for the potential distribution in the body, with analytical expressions for the symmetry lines in the body interior from which threshold conditions and short-channel effects can be precisely described. Excellent agreement with numerical simulations is obtained.
引用
收藏
页码:57 / 60
页数:4
相关论文
共 50 条
  • [41] Piezoresistance effect of strained and unstrained fully-depleted silicon-on-insulator MOSFETs integrating a HfO2/TiN gate stack
    Rochette, F.
    Casse, M.
    Mouis, M.
    Haziot, A.
    Pioger, T.
    Ghibaudo, G.
    Boulanger, F.
    SOLID-STATE ELECTRONICS, 2009, 53 (03) : 392 - 396
  • [42] An Analytical 2D Current Model of Double-Gate Schottky-Barrier MOSFETs
    Zhao, Yu Ning
    Du, Gang
    Kang, Jin Feng
    Liu, Xiao Yan
    Han, Ruqi
    SISPAD: 2008 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2008, : 133 - 136
  • [43] A Semi 2D Analytical Vth Model for Junctionless Double Gate Nanoscale Silicon on Nothing (JLDG-SON) MOSFET
    Basak, Subhramita
    Saha, Priyanka
    Sarkar, Subir Kumar
    2014 RECENT ADVANCES IN ENGINEERING AND COMPUTATIONAL SCIENCES (RAECS), 2014,
  • [44] Nanoscale strain and band structure engineering using epitaxial stressors on ultrathin silicon-on-insulator
    Sutter, P
    Sutter, E
    Rugheimer, P
    Lagally, MG
    SURFACE SCIENCE, 2003, 532 : 789 - 794
  • [45] Gate bias symmetry dependency of electron mobility and prospect of velocity modulation in double-gate silicon-on-insulator transistors
    Prunnila, M
    Ahopelto, J
    Henttinen, K
    Gamiz, F
    APPLIED PHYSICS LETTERS, 2004, 85 (22) : 5442 - 5444
  • [46] Modeling of electron gate current and post-stress drain current of p-type silicon-on-insulator MOSFETs
    Sheu, CJ
    Jang, SL
    SOLID-STATE ELECTRONICS, 2003, 47 (04) : 705 - 711
  • [47] 2D Quantum Mechanical Simulation of Gate-Leakage Current in Double-Gate n-MOSFETs
    Muraoka, Satoru
    Mukai, Ryota
    Souma, Satofumi
    Ogawa, Matsuto
    2009 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2009, : 297 - 300
  • [48] 2D Transconductance to Drain Current Ratio Modeling of Dual Material Surrounding Gate Nanoscale SOI MOSFETs
    Balamurugan, N. B.
    Sankaranarayanan, K.
    John, M. Fathima
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2009, 9 (02) : 110 - 116
  • [49] Local silicon-gate carbon nanotube field effect transistors using silicon-on-insulator technology
    Zhang, Min
    Chan, Philip C. H.
    Chai, Yang
    Liang, Qi
    Tang, Z. K.
    APPLIED PHYSICS LETTERS, 2006, 89 (02)
  • [50] Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer
    Song, In-Hyouk
    Forfang, William B. D.
    Cole, Bryan
    You, Byoung Hee
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2014, 24 (10)