Cycle-accurate energy estimation in system level descriptions of embedded systems

被引：0
|
作者：
García, ABA
Gobert, J
Dombek, T
Mehrez, H
Pétrot, F
机构：
来源：
ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Simulating performance and energy consumption of embedded systems using a system level description is a challenging task in VLSI CAD. However such simulations are needed to select the best hardware architecture and software organization for a particular application. In this paper, we present an approach for cycle-accurate hardware/software co-simulations of energy consumption in embedded systems. The aim of our work is to provide a simulation framework enabling power estimations for high level descriptions (behavioral C models) of embedded systems that include new hardware components. A System-level Cycle-Accurate Simulator and a processor Instruction Set Simulator are extended with energy models that take into account the transitions in the state of the component per cycle.
引用
收藏
页码：549 / 552
页数：4
相关论文
共 50 条
  • [21] Rapid Cycle-Accurate Simulator for High-Level Synthesis
    Chi, Yuze
    Choi, Young-kyu
    Cong, Jason
    Wang, Jie
    PROCEEDINGS OF THE 2019 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE GATE ARRAYS (FPGA'19), 2019, : 178 - 183
  • [22] Cycle-Accurate and Cycle-Reproducible Debugging of Embedded Designs using Artificial Intelligence
    Khan, Habib ul Hasan
    Goehringer, Diana
    2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2018, : 449 - 450
  • [23] RTL-aware cycle-accurate functional power estimation
    Zhong, Lin
    Ravi, Srivaths
    Raghunathan, Anand
    Jha, Niraj K.
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2006, 25 (10) : 2103 - 2117
  • [24] Energy estimation and optimization in architectural descriptions of complex embedded systems
    Abril, A
    Mehrez, H
    Pétrot, F
    Gobert, J
    Miro, C
    VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2, 2005, 5837 : 456 - 466
  • [25] A Prototype-Based Gate-Level Cycle-Accurate Methodology for SoC Performance Exploration and Estimation
    Su, Ching-Lung
    Chen, Tse-Min
    Wu, Kuo-Hsuan
    VLSI DESIGN, 2013, 2013
  • [26] A cycle-accurate transaction level SystemC model for a serial communication bus
    Aziz, Syed Mahfuzul
    COMPUTERS & ELECTRICAL ENGINEERING, 2009, 35 (05) : 790 - 802
  • [27] A Cycle-Accurate Simulator for a Reconfigurable Multi-Media System
    Zhu, Min
    Liu, Leibo
    Yin, Shouyi
    Yin, Chongyong
    Wei, Shaojun
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2010, E93D (12) : 3202 - 3210
  • [28] A cycle-accurate transaction-level modelled energy simulation approach for heterogeneous Wireless Sensor Networks
    Galos, Mihai
    Navarro, David
    Mieyeville, Fabien
    O'Connor, Ian
    2012 IEEE 10TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2012, : 209 - 212
  • [29] Cycle-accurate verification of AHB-based RTL IP with transaction-level system environment
    Shim, Heejun
    Lee, Sang-Heon
    Woo, Yun-Sik
    Chung, Moo-Kyoung
    Lee, Jae-Gon
    Kyung, Chong-Min
    2006 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS, 2006, : 135 - +
  • [30] Cycle-accurate macro-models for RT-level power analysis
    Qiu, QR
    Wu, Q
    Pedram, M
    Ding, CS
    1997 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, PROCEEDINGS, 1997, : 125 - 130
12345