Cycle-accurate energy estimation in system level descriptions of embedded systems

被引:0
|
作者
García, ABA
Gobert, J
Dombek, T
Mehrez, H
Pétrot, F
机构
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Simulating performance and energy consumption of embedded systems using a system level description is a challenging task in VLSI CAD. However such simulations are needed to select the best hardware architecture and software organization for a particular application. In this paper, we present an approach for cycle-accurate hardware/software co-simulations of energy consumption in embedded systems. The aim of our work is to provide a simulation framework enabling power estimations for high level descriptions (behavioral C models) of embedded systems that include new hardware components. A System-level Cycle-Accurate Simulator and a processor Instruction Set Simulator are extended with energy models that take into account the transitions in the state of the component per cycle.
引用
收藏
页码:549 / 552
页数:4
相关论文
共 50 条
  • [31] Precision tunable RTL macro-modelling cycle-accurate power estimation
    Schafer, B. Carrion
    Wakabayashi, K.
    IET COMPUTERS AND DIGITAL TECHNIQUES, 2011, 5 (02): : 95 - 103
  • [32] Cycle-accurate macro-models for RT-level power analysis
    Wu, Q
    Qiu, Q
    Pedram, M
    Ding, CS
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1998, 6 (04) : 520 - 528
  • [33] Fast cycle-accurate simulation and instruction set generation for constraint-based descriptions of programmable architectures
    Weber, SJ
    Moskewicz, MW
    Gries, M
    Sauer, C
    Keutzer, K
    INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS, 2004, : 18 - 23
  • [34] Embedded processor validation environment using a cycle-accurate retargetable instruction-set simulator
    Yang, HM
    Lee, M
    JOURNAL OF SUPERCOMPUTING, 2005, 33 (1-2): : 19 - 32
  • [35] Embedded processor validation environment using a cycle-accurate retargetable instruction-set simulator
    Yang H.
    Lee M.
    The Journal of Supercomputing, 2005, 33 (1) : 19 - 32
  • [36] SACA: System-level Analog CIM Accelerators Simulation Framework: Architecture and Cycle-accurate System-to-device Simulator
    Vadivel, Kanishkan
    Garcia-Redondo, Fernando
    BanaGozar, Ali
    Corporaal, Henk
    Das, Shidhartha
    PROCEEDINGS OF THE 37TH CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS 2022), 2022, : 313 - 318
  • [37] Embedded processor validation environment using a cycle-accurate retargetable instruction-set simulator
    Hoonmo Yang
    Moonkey Lee
    The Journal of Supercomputing, 2005, 33 (1-2) : 19 - 32
  • [38] Cost Modeling and Cycle-Accurate Co-Simulation of Heterogeneous Multiprocessor Systems
    van Haastregt, Sven
    Halm, Eyal
    Kienhuis, Bart
    2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010), 2010, : 1297 - 1300
  • [39] A QEMU and SystemC-Based Cycle-Accurate ISS for Performance Estimation on SoC Development
    Chiang, Ming-Chao
    Yeh, Tse-Chen
    Tseng, Guo-Fu
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2011, 30 (04) : 593 - 606
  • [40] Automatic Integration of Cycle-accurate Descriptions with Continuous-time Models for Cyber-Physical Virtual Platforms
    Lora, Michele
    Centomo, Stefano
    Quaglia, Davide
    Fummi, Franco
    PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2018, : 676 - 681