14-mW 5-GHz frequency synthesizer with CMOS logic divider and phase-switching dual-modulus prescaler

被引：0

作者：

Kim, Myeungsu ^{[1
]}

Park, T. J. ^{[1
]}

Kwon, Yongil ^{[1
]}

Lim, Joonhyung ^{[1
]}

Park, Sang-Gyu ^{[1
]}

Kim, Sung-Han ^{[1
]}

机构：

[1] Samsung Elect Mech, LAB Cent R&D, Suwon 443743, Gyunggi Do, South Korea

来源：

2006 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM | 2006年

关键词：

frequency divider; integer NPLL; phase locked loop; phase switching; prescaler;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 5-GHz frequency synthesizer for ZIGBEE(IEEE 802.15.4) was implemented. It consumes only 14mW adopting CMOS Logic divider and phase-switching dual-modulus. A 2(nd) loop filter is internally embodied to reduce external components. The phase switching is made between the 45 degrees spaced output phases to reduce the power consumption and improve the robustness of circuit. This synthesizer was fabricated in 0.18-um technology; it consumes 8mA at 1.8V and offers I00kHz-loop bandwidth and -103dBc/Hz at an offset of 1MHz. the lock time is 30us. The PLL output tuning range is 11% from 2.37GHz to 2.66GHz.

引用

页码：449 / 452

页数：4

共 42 条

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