Field configurable system-on-chip device architecture

被引:10
|
作者
Knapp, S [1 ]
Tavana, D [1 ]
机构
[1] Triscend Corp, Mt View, CA 94043 USA
关键词
D O I
10.1109/CICC.2000.852639
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Time to market pressures, increasing system complexity, and smaller process geometries, are creating a market vacuum that will be increasingly addressed by an important emerging category of devices: the Configurable System-on-Chip (CsoC). These application specific programmable parts (ASPP) are single chip combinations of microprocessors, memory, dedicated peripheral functions, and embedded programmable logic. They provide unprecedented time-to-market benefits and field customization for the electronic systems of this upcoming decade. Integration of microprocessors, memory, peripherals, and programmable logic is made possible with a new bus architecture called the Configurable System Interconnect Bus (CSI). The Configurable System Interconnect Bus was specifically designed to facilitate re-use, guarantee timing, increase system throughput, and reduce system debug time in applications that require intense time-to-market and field upgrade. [GRAPHICS]
引用
收藏
页码:155 / 158
页数:4
相关论文
共 50 条
  • [31] System-on-Chip Platform Security Assurance: Architecture and Validation
    Ray, Sandip
    Peeters, Eric
    Tehranipoor, Mark M.
    Bhunia, Swarup
    PROCEEDINGS OF THE IEEE, 2018, 106 (01) : 21 - 37
  • [32] Multi stream cipher architecture for reconfigurable system-on-chip
    Wee, C. M.
    Sutton, P. R.
    Bergmann, N. W.
    Williams, J. A.
    2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2006, : 769 - 772
  • [33] Generic architecture platform for multiprocessor system-on-chip design
    Baghdadi, A
    Zergainoh, NE
    Lyonnard, D
    Jerraya, AA
    ARCHITECTURE AND DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS, 2001, 61 : 53 - 63
  • [34] A low-cost configurable PWM controller using programmable system-on-chip
    Li, QM
    PESC'03: 2003 IEEE 34TH ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-4, CONFERENCE PROCEEDINGS, 2003, : 1169 - 1174
  • [35] Architecture, On-Chip Network and Programming Interface Concept for Multiprocessor System-on-Chip
    Samman, Faisal Arya
    Dollak, Bjoern
    Antoni, Jonatan
    Hollstein, Thomas
    2016 INTERNATIONAL CONFERENCE ON SMART GREEN TECHNOLOGY IN ELECTRICAL AND INFORMATION SYSTEMS (ICSGTEIS), 2016, : 155 - 160
  • [36] Bus architecture of a system on a chip with user-configurable system logic
    Winegarden, S
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (03) : 425 - 433
  • [37] System level modelling of reconfigurable FFT architecture for system-on-chip design
    Ahmadinia, Ali
    Ahmad, Balal
    Arslan, Tughrul
    NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS, PROCEEDINGS, 2007, : 169 - +
  • [38] Design, Modelling and Testing of Mechatronic System Controlled with System-on-Chip Device
    Drumea, Andrei
    Vasile, Alexandru
    Svasta, Paul
    2009 32ND INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY, 2009, : 451 - 456
  • [39] Highly Configurable Framework for Adaptive Low Power and Error-Resilient System-On-Chip
    Veleski, Mitko
    Huebner, Michael
    Krstic, Milos
    Kraemer, Rolf
    2020 23RD EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2020), 2020, : 24 - 28
  • [40] A reconfigurable system-on-chip architecture for medical imaging: Preliminary results
    Zhang, Hui
    Gu, Zi
    Xia, Mingxin
    Tang, Zhiwei
    Hu, Guangshu
    2005 27TH ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN MEDICINE AND BIOLOGY SOCIETY, VOLS 1-7, 2005, : 1747 - 1749